/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonCallingConvLower.h | 118 /// AllocateReg - Attempt to allocate one register. If it is not available, 121 unsigned AllocateReg(unsigned Reg) { function in class:llvm::Hexagon_CCState 127 /// Version of AllocateReg with extra register to be shadowed. 128 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) { function in class:llvm::Hexagon_CCState 135 /// AllocateReg - Attempt to allocate one of the specified registers. If none 138 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) { function in class:llvm::Hexagon_CCState 149 /// Version of AllocateReg with list of registers to be shadowed. 150 unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs, function in class:llvm::Hexagon_CCState
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H A D | HexagonVarargsCallingConvention.h | 56 if (unsigned Reg = State.AllocateReg(RegList1, 6)) { 68 if (unsigned Reg = State.AllocateReg(RegList2, 3)) { 112 if (unsigned Reg = State.AllocateReg(RegList1, 6)) { 124 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
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H A D | HexagonISelLowering.cpp | 177 if (unsigned Reg = State.AllocateReg(RegList, 6)) { 191 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) { 202 if (unsigned Reg = State.AllocateReg(RegList1, RegList2, 2)) { 248 if (unsigned Reg = State.AllocateReg(Hexagon::R0)) { 263 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.h | 34 if (unsigned Reg = State.AllocateReg(RegList, 4)) 49 if (unsigned Reg = State.AllocateReg(RegList, 4)) 79 unsigned Reg = State.AllocateReg(HiRegList, ShadowRegList, 2); 83 Reg = State.AllocateReg(GPRArgRegs, 4); 102 unsigned T = State.AllocateReg(LoRegList[i]); 129 unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2);
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H A D | ARMISelLowering.cpp | 1750 unsigned reg = State->AllocateReg(GPRArgRegs, 4); 1776 reg = State->AllocateReg(GPRArgRegs, 4); 1786 while (State->AllocateReg(GPRArgRegs, 4)) 1803 State->AllocateReg(GPRArgRegs, 4);
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/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 288 /// AllocateReg - Attempt to allocate one register. If it is not available, 291 unsigned AllocateReg(unsigned Reg) { function in class:llvm::CCState 297 /// Version of AllocateReg with extra register to be shadowed. 298 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) { function in class:llvm::CCState 305 /// AllocateReg - Attempt to allocate one of the specified registers. If none 308 unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) { function in class:llvm::CCState 319 /// Version of AllocateReg with list of registers to be shadowed. 320 unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs, function in class:llvm::CCState
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/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2121 Reg = State.AllocateReg(IntRegs, IntRegsSize); 2125 Reg = State.AllocateReg(IntRegs, IntRegsSize); 2130 Reg = State.AllocateReg(IntRegs, IntRegsSize); 2132 Reg = State.AllocateReg(IntRegs, IntRegsSize); 2133 State.AllocateReg(IntRegs, IntRegsSize); 2138 Reg = State.AllocateReg(F32Regs, FloatRegsSize); 2140 State.AllocateReg(IntRegs, IntRegsSize); 2142 Reg = State.AllocateReg(F64Regs, FloatRegsSize); 2144 unsigned Reg2 = State.AllocateReg(IntRegs, IntRegsSize); 2146 State.AllocateReg(IntReg [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
H A D | SIISelLowering.cpp | 151 CCInfo.AllocateReg(AMDGPU::VGPR0); 152 CCInfo.AllocateReg(AMDGPU::VGPR1);
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/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 58 if (unsigned Reg = State.AllocateReg(RegList, 6)) { 69 if (unsigned Reg = State.AllocateReg(RegList, 6))
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/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/ |
H A D | MBlazeISelLowering.cpp | 668 unsigned Reg = State.AllocateReg(ArgRegs, NumArgRegs);
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/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 810 State.AllocateReg(AArch64ArgRegs[i]);
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/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 1870 State.AllocateReg(ArgRegs[RegNum]); 1896 State.AllocateReg(ArgRegs[RegNum]);
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