Searched refs:AllocateReg (Results 1 - 12 of 12) sorted by relevance

/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.h118 /// AllocateReg - Attempt to allocate one register. If it is not available,
121 unsigned AllocateReg(unsigned Reg) { function in class:llvm::Hexagon_CCState
127 /// Version of AllocateReg with extra register to be shadowed.
128 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) { function in class:llvm::Hexagon_CCState
135 /// AllocateReg - Attempt to allocate one of the specified registers. If none
138 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) { function in class:llvm::Hexagon_CCState
149 /// Version of AllocateReg with list of registers to be shadowed.
150 unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs, function in class:llvm::Hexagon_CCState
H A DHexagonVarargsCallingConvention.h56 if (unsigned Reg = State.AllocateReg(RegList1, 6)) {
68 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
112 if (unsigned Reg = State.AllocateReg(RegList1, 6)) {
124 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
H A DHexagonISelLowering.cpp177 if (unsigned Reg = State.AllocateReg(RegList, 6)) {
191 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
202 if (unsigned Reg = State.AllocateReg(RegList1, RegList2, 2)) {
248 if (unsigned Reg = State.AllocateReg(Hexagon::R0)) {
263 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMCallingConv.h34 if (unsigned Reg = State.AllocateReg(RegList, 4))
49 if (unsigned Reg = State.AllocateReg(RegList, 4))
79 unsigned Reg = State.AllocateReg(HiRegList, ShadowRegList, 2);
83 Reg = State.AllocateReg(GPRArgRegs, 4);
102 unsigned T = State.AllocateReg(LoRegList[i]);
129 unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2);
H A DARMISelLowering.cpp1750 unsigned reg = State->AllocateReg(GPRArgRegs, 4);
1776 reg = State->AllocateReg(GPRArgRegs, 4);
1786 while (State->AllocateReg(GPRArgRegs, 4))
1803 State->AllocateReg(GPRArgRegs, 4);
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h288 /// AllocateReg - Attempt to allocate one register. If it is not available,
291 unsigned AllocateReg(unsigned Reg) { function in class:llvm::CCState
297 /// Version of AllocateReg with extra register to be shadowed.
298 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) { function in class:llvm::CCState
305 /// AllocateReg - Attempt to allocate one of the specified registers. If none
308 unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) { function in class:llvm::CCState
319 /// Version of AllocateReg with list of registers to be shadowed.
320 unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs, function in class:llvm::CCState
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2121 Reg = State.AllocateReg(IntRegs, IntRegsSize);
2125 Reg = State.AllocateReg(IntRegs, IntRegsSize);
2130 Reg = State.AllocateReg(IntRegs, IntRegsSize);
2132 Reg = State.AllocateReg(IntRegs, IntRegsSize);
2133 State.AllocateReg(IntRegs, IntRegsSize);
2138 Reg = State.AllocateReg(F32Regs, FloatRegsSize);
2140 State.AllocateReg(IntRegs, IntRegsSize);
2142 Reg = State.AllocateReg(F64Regs, FloatRegsSize);
2144 unsigned Reg2 = State.AllocateReg(IntRegs, IntRegsSize);
2146 State.AllocateReg(IntReg
[all...]
/freebsd-10.0-release/contrib/llvm/lib/Target/R600/
H A DSIISelLowering.cpp151 CCInfo.AllocateReg(AMDGPU::VGPR0);
152 CCInfo.AllocateReg(AMDGPU::VGPR1);
/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp58 if (unsigned Reg = State.AllocateReg(RegList, 6)) {
69 if (unsigned Reg = State.AllocateReg(RegList, 6))
/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp668 unsigned Reg = State.AllocateReg(ArgRegs, NumArgRegs);
/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp810 State.AllocateReg(AArch64ArgRegs[i]);
/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp1870 State.AllocateReg(ArgRegs[RegNum]);
1896 State.AllocateReg(ArgRegs[RegNum]);

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