Searched refs:wrmsr (Results 1 - 25 of 50) sorted by relevance

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/freebsd-10-stable/sys/amd64/vmm/amd/
H A Dsvm_msr.c98 wrmsr(MSR_LSTAR, host_msrs[IDX_MSR_LSTAR]);
99 wrmsr(MSR_CSTAR, host_msrs[IDX_MSR_CSTAR]);
100 wrmsr(MSR_STAR, host_msrs[IDX_MSR_STAR]);
101 wrmsr(MSR_SF_MASK, host_msrs[IDX_MSR_SF_MASK]);
H A Dsvm_support.S145 wrmsr
/freebsd-10-stable/sys/amd64/amd64/
H A Dinitcpu.c112 wrmsr(0xc0011029, rdmsr(0xc0011029) | 1);
125 wrmsr(MSR_NB_CFG1, msr);
139 wrmsr(0xc001102a, msr);
153 wrmsr(0xc0011020, msr);
181 wrmsr(0x110B, rdmsr(0x110B) | VIA_CPUID_DO_RNG);
194 wrmsr(0x1107, rdmsr(0x1107) | (1 << 28));
225 wrmsr(MSR_EFER, msr);
H A Damd64_mem.c329 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE);
342 wrmsr(msr, msrv);
354 wrmsr(msr, msrv);
366 wrmsr(msr, msrv);
382 wrmsr(msr, msrv);
391 wrmsr(msr + 1, msrv);
399 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE);
708 wrmsr(MSR_MTRRdefType, mtrrdef);
H A Dcpu_switch.S431 wrmsr
435 wrmsr
439 wrmsr
444 wrmsr
450 wrmsr
454 wrmsr
458 wrmsr
461 wrmsr
H A Dmpboot.S106 wrmsr
H A Dexception.S482 wrmsr
494 wrmsr
596 wrmsr
682 wrmsr
819 wrmsr
840 wrmsr
857 wrmsr /* May trap if non-canonical, but only for TLS. */
H A Dmp_machdep.c694 wrmsr(MSR_FSBASE, 0); /* User value */
695 wrmsr(MSR_GSBASE, (u_int64_t)pc);
696 wrmsr(MSR_KGSBASE, (u_int64_t)pc); /* XXX User value while we're in the kernel */
715 wrmsr(MSR_EFER, msr);
716 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
717 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
720 wrmsr(MSR_STAR, msr);
721 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
/freebsd-10-stable/sys/i386/i386/
H A Dinitcpu.c137 wrmsr(0x1000, 0x9c92LL); /* FP operand can be cacheable on Cyrix FPU */
139 wrmsr(0x1000, 0x1c92LL); /* Intel FPU */
142 wrmsr(0x1001, (0xd0LL << 32) | 0x3ff);
144 wrmsr(0x1002, 0x04000000LL); /* Enables triple-clock mode. */
146 wrmsr(0x1002, 0x03000000LL); /* Enables double-clock mode. */
468 wrmsr(0x0107, fcr);
552 wrmsr(MSR_APICBASE, apicbase);
569 wrmsr(MSR_APICBASE, apicbase);
605 wrmsr(MSR_BBL_CR_CTL3, bbl_cr_ctl3);
647 wrmsr(
[all...]
H A Dperfmon.c141 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
185 wrmsr(msr_pmc[pmc], pmc_shadow[pmc]);
236 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
254 wrmsr(msr_ctl[pmc], 0);
256 wrmsr(msr_ctl[pmc], ctl_shadow[pmc]);
290 wrmsr(msr_ctl[0], newval);
H A Di686_mem.c323 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE);
336 wrmsr(msr, msrv);
348 wrmsr(msr, msrv);
360 wrmsr(msr, msrv);
376 wrmsr(msr, msrv);
385 wrmsr(msr + 1, msrv);
393 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE);
674 wrmsr(MSR_MTRRdefType, mtrrdef);
H A Dlongrun.c146 wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
151 wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);
H A Dk6_mem.c169 wrmsr(UWCCR, reg);
/freebsd-10-stable/sys/amd64/vmm/intel/
H A Dvmx_msr.c360 wrmsr(MSR_LSTAR, guest_msrs[IDX_MSR_LSTAR]);
361 wrmsr(MSR_CSTAR, guest_msrs[IDX_MSR_CSTAR]);
362 wrmsr(MSR_STAR, guest_msrs[IDX_MSR_STAR]);
363 wrmsr(MSR_SF_MASK, guest_msrs[IDX_MSR_SF_MASK]);
364 wrmsr(MSR_KGSBASE, guest_msrs[IDX_MSR_KGSBASE]);
380 wrmsr(MSR_LSTAR, host_msrs[IDX_MSR_LSTAR]);
381 wrmsr(MSR_CSTAR, host_msrs[IDX_MSR_CSTAR]);
382 wrmsr(MSR_STAR, host_msrs[IDX_MSR_STAR]);
383 wrmsr(MSR_SF_MASK, host_msrs[IDX_MSR_SF_MASK]);
/freebsd-10-stable/sys/dev/hyperv/vmbus/
H A Dvmbus_et.c106 wrmsr(MSR_HV_STIMER0_COUNT, current);
165 wrmsr(MSR_HV_STIMER0_COUNT, 0);
172 wrmsr(MSR_HV_STIMER0_CONFIG,
H A Dhyperv.c248 wrmsr(MSR_HV_GUEST_OS_ID, MSR_HV_GUESTID_FREEBSD);
302 wrmsr(MSR_HV_HYPERCALL, hc);
330 wrmsr(MSR_HV_HYPERCALL, (hc & MSR_HV_HYPERCALL_RSVD_MASK));
H A Dvmbus.c617 wrmsr(MSR_HV_EOM, 0);
658 wrmsr(MSR_HV_EOM, 0);
730 wrmsr(MSR_HV_SIMP, val);
739 wrmsr(MSR_HV_SIEFP, val);
749 wrmsr(sint, val);
758 wrmsr(sint, val);
765 wrmsr(MSR_HV_SCONTROL, val);
778 wrmsr(MSR_HV_SCONTROL, (orig & MSR_HV_SCTRL_RSVD_MASK));
785 wrmsr(sint, orig | MSR_HV_SINT_MASKED);
792 wrmsr(sin
[all...]
/freebsd-10-stable/sys/x86/x86/
H A Dmca.c452 wrmsr(MSR_MC_STATUS(bank), 0);
553 wrmsr(MSR_MC_CTL2(bank), ctl);
586 wrmsr(MSR_MC_CTL2(bank), ctl);
814 wrmsr(MSR_MC_CTL2(i), ctl);
825 wrmsr(MSR_MC_CTL2(i), ctl);
832 wrmsr(MSR_MC_CTL2(i), ctl);
859 wrmsr(MSR_MC_CTL2(i), ctl);
885 wrmsr(MSR_MCG_CTL, MCG_CTL_ENABLE);
900 wrmsr(MSR_MC0_CTL_MASK, mask | (1UL << 5));
922 wrmsr(MSR_MC_CT
[all...]
/freebsd-10-stable/sys/boot/i386/libi386/
H A Damd64_tramp.S83 wrmsr
/freebsd-10-stable/sys/dev/hwpmc/
H A Dhwpmc_uncore.c156 wrmsr(SELECTSEL(uncore_cputype) + n, 0);
158 wrmsr(UCF_CTRL, 0);
338 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl);
343 wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl);
373 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl);
378 wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl);
408 wrmsr(UCF_CTRL, 0); /* Turn off fixed counters */
409 wrmsr(UCF_CTR0 + ri, v);
410 wrmsr(UCF_CTRL, cc->pc_ucfctrl);
1060 wrmsr(MSR_GQ_SNOOP_MES
[all...]
H A Dhwpmc_piv.c662 wrmsr(P4_CCCR_MSR_FIRST + i,
772 wrmsr(pd->pm_pmc_msr, v);
1198 wrmsr(escrmsr, escrvalue | escrtbits);
1199 wrmsr(pd->pm_cccr_msr, cccrvalue | cccrtbits | P4_CCCR_ENABLE);
1227 wrmsr(pd->pm_pmc_msr,
1239 wrmsr(pd->pm_cccr_msr, cccrvalue & ~P4_CCCR_ENABLE);
1278 wrmsr(escrmsr, escrvalue);
1279 wrmsr(pd->pm_cccr_msr, cccrvalue);
1324 wrmsr(pd->pm_cccr_msr,
1362 wrmsr(p
[all...]
H A Dhwpmc_amd.c345 wrmsr(pd->pm_perfctr, v);
581 wrmsr(pd->pm_evsel, config);
617 wrmsr(pd->pm_evsel, config);
686 wrmsr(evsel, config & ~AMD_PMC_ENABLE);
687 wrmsr(perfctr, AMD_RELOAD_COUNT_TO_PERFCTR_VALUE(v));
693 wrmsr(evsel, config);
828 wrmsr(AMD_PMC_EVSEL_0 + i, evsel);
/freebsd-10-stable/sys/dev/agp/
H A Dagp_nvidia.c414 wrmsr(IORR_BASE0 + 2 * iorr_addr, base);
415 wrmsr(IORR_MASK0 + 2 * iorr_addr, mask);
419 wrmsr(SYSCFG, sys);
/freebsd-10-stable/sys/amd64/acpica/
H A Dacpi_wakecode.S164 wrmsr
/freebsd-10-stable/sys/dev/hyperv/vmbus/amd64/
H A Dhyperv_machdep.c207 wrmsr(MSR_HV_REFERENCE_TSC, val);

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