| #
313150 |
|
03-Feb-2017 |
kib |
MFC r289894:
CLFLUSH does not need barriers, the instruction is ordered WRT other writes.
Use CLFLUSHOPT when available.
MFC r312555:
Use SFENCE for ordering CLFLUSHOPT.
|
| #
307998 |
|
27-Oct-2016 |
avg |
MFC r305539: work around AMD erratum 793 for family 16h, models 00h-0Fh
|
| #
304131 |
|
15-Aug-2016 |
avg |
MFC r302835: fix-up for configuration of AMD Family 10h processors
borrowed from Linux
|
| #
300038 |
|
17-May-2016 |
avg |
MFC r298737: fix up r300036
|
| #
300036 |
|
17-May-2016 |
avg |
MFC r298736: ensure that initial local apic id is sane on AMD 10h systems
|
| #
284338 |
|
13-Jun-2015 |
kib |
MFC r284104:
Updates from SDM rev. 55.
|
| #
277374 |
|
19-Jan-2015 |
kib |
MFC r277047:
For x86, read MAXPHYADDR into variable cpu_maxphyaddr.
|
| #
284338 |
|
13-Jun-2015 |
kib |
MFC r284104:
Updates from SDM rev. 55.
|
| #
277374 |
|
19-Jan-2015 |
kib |
MFC r277047:
For x86, read MAXPHYADDR into variable cpu_maxphyaddr.
|