Searched refs:crtc_base (Results 1 - 6 of 6) sorted by relevance

/freebsd-10-stable/sys/dev/drm2/radeon/
H A Drv770.c49 u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) argument
61 WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
62 WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
64 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
65 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
68 (u32)crtc_base);
70 (u32)crtc_base);
H A Dradeon_asic.h144 extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
242 extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
405 u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
448 extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
H A Drs600.c130 u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) argument
142 (u32)crtc_base);
144 (u32)crtc_base);
H A Devergreen.c209 * @crtc_base: new address of the crtc (GPU MC address)
217 u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) argument
229 upper_32_bits(crtc_base));
231 (u32)crtc_base);
234 upper_32_bits(crtc_base));
236 (u32)crtc_base);
H A Dradeon.h1291 u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
H A Dr100.c180 * @crtc_base: new address of the crtc (GPU MC address)
188 u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) argument
191 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK;

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