/freebsd-10-stable/contrib/llvm/include/llvm/IR/ |
H A D | Constant.h | 47 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) argument 48 : User(ty, vty, Ops, NumOps) {}
|
H A D | InlineAsm.h | 233 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { argument 234 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!"); 236 return Kind | (NumOps << 3);
|
H A D | User.h | 52 User(Type *ty, unsigned vty, Use *OpList, unsigned NumOps) argument 53 : Value(ty, vty), OperandList(OpList), NumOperands(NumOps) {}
|
H A D | GlobalValue.h | 59 GlobalValue(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps, argument 61 : Constant(ty, vty, Ops, NumOps), Linkage(linkage),
|
H A D | Instruction.h | 445 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps, 447 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
|
H A D | InstrTypes.h | 38 Use *Ops, unsigned NumOps, 40 : Instruction(Ty, iType, Ops, NumOps, InsertBefore) {} 43 Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd) 44 : Instruction(Ty, iType, Ops, NumOps, InsertAtEnd) {} 37 TerminatorInst(Type *Ty, Instruction::TermOps iType, Use *Ops, unsigned NumOps, Instruction *InsertBefore = 0) argument 42 TerminatorInst(Type *Ty, Instruction::TermOps iType, Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd) argument
|
/freebsd-10-stable/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86BaseInfo.h | 569 unsigned NumOps = Desc.getNumOperands(); local 571 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) 573 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && 578 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && 579 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1) 583 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
|
H A D | X86MCCodeEmitter.cpp | 678 unsigned NumOps = Desc.getNumOperands(); local 680 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) 682 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && 687 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && 688 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1) 692 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0) 958 unsigned NumOps = MI.getNumOperands(); local 960 bool isTwoAddr = NumOps > 1 && 965 for (; i != NumOps; 1199 unsigned NumOps = Desc.getNumOperands(); local [all...] |
/freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
H A D | MachineRegisterInfo.cpp | 146 unsigned NumOps = MI->getNumOperands(); local 147 if (!(MO >= MO0 && MO < MO0+NumOps)) { 241 /// Move NumOps operands from Src to Dst, updating use-def lists as needed. 250 unsigned NumOps) { 251 assert(Src != Dst && NumOps && "Noop moveOperands"); 255 if (Dst >= Src && Dst < Src + NumOps) { 257 Dst += NumOps - 1; 258 Src += NumOps - 1; 287 } while (--NumOps); 248 moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps) argument
|
H A D | CallingConvLower.cpp | 120 unsigned NumOps = Outs.size(); local 121 for (unsigned i = 0; i != NumOps; ++i) { 139 unsigned NumOps = ArgVTs.size(); local 140 for (unsigned i = 0; i != NumOps; ++i) {
|
H A D | MachineInstr.cpp | 538 if (unsigned NumOps = MCID->getNumOperands() + 540 CapOperands = OperandCapacity::get(NumOps); 601 /// Move NumOps MachineOperands from Src to Dst, with support for overlapping 604 unsigned NumOps, MachineRegisterInfo *MRI) { 606 return MRI->moveOperands(Dst, Src, NumOps); 611 for (unsigned i = 0; i != NumOps; ++i) 614 for (unsigned i = NumOps; i ; --i) 932 unsigned NumOps; 934 i += NumOps) { 939 NumOps 603 moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps, MachineRegisterInfo *MRI) argument 1163 unsigned NumOps; local [all...] |
/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonCallingConvLower.cpp | 136 unsigned NumOps = Outs.size(); local 146 for (; i != NumOps; ++i) { 164 unsigned NumOps = ArgVTs.size(); local 165 for (unsigned i = 0; i != NumOps; ++i) {
|
/freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
H A D | X86CodeEmitter.cpp | 172 unsigned NumOps = Desc.getNumOperands(); local 173 if (NumOps) { 174 bool isTwoAddr = NumOps > 1 && 179 for (unsigned e = NumOps; i != e; ++i) { 197 for (unsigned e = NumOps; i != e; ++i) { 209 for (; i != NumOps; ++i) { 226 if (NumOps > e && X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(e))) 243 for (unsigned e = NumOps; i != e; ++i) { 932 unsigned NumOps = Desc->getNumOperands(); 934 if (NumOps > [all...] |
H A D | X86FloatingPoint.cpp | 986 unsigned NumOps = MI->getDesc().getNumOperands(); 987 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && 991 unsigned Reg = getFPReg(MI->getOperand(NumOps-1)); 1023 MI->RemoveOperand(NumOps-1); // Remove explicit ST(0) operand 1051 unsigned NumOps = MI->getDesc().getNumOperands(); 1052 assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!"); 1473 unsigned NumOps = 0; 1475 i != e && MI->getOperand(i).isImm(); i += 1 + NumOps) { 1477 NumOps [all...] |
/freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
H A D | Thumb2SizeReduction.cpp | 702 unsigned NumOps = MCID.getNumOperands(); local 703 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); 704 if (HasCC && MI->getOperand(NumOps-1).isDead()) 728 unsigned NumOps = MCID.getNumOperands(); local 730 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) 798 unsigned NumOps = MCID.getNumOperands(); local 799 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); 800 if (HasCC && MI->getOperand(NumOps-1).isDead()) 824 unsigned NumOps = MCID.getNumOperands(); local 826 if (i < NumOps [all...] |
/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 612 const SDUse *Ops, unsigned NumOps); 614 const SDValue *Ops, unsigned NumOps); 617 const SDValue *Ops, unsigned NumOps); 619 const SDValue *Ops, unsigned NumOps); 621 const SDValue *Ops, unsigned NumOps); 733 SDValue* Ops, unsigned NumOps, MachineMemOperand *MMO, 743 const SDValue *Ops, unsigned NumOps, 749 const SDValue *Ops, unsigned NumOps, 755 const SDValue *Ops, unsigned NumOps, 759 SDValue getMergeValues(const SDValue *Ops, unsigned NumOps, SDLo [all...] |
H A D | SelectionDAGNodes.h | 702 const SDValue *Ops, unsigned NumOps) 705 OperandList(NumOps ? new SDUse[NumOps] : 0), 707 NumOperands(NumOps), NumValues(VTs.NumVTs), 709 for (unsigned i = 0; i != NumOps; ++i) { 986 unsigned NumOps, EVT MemoryVT, MachineMemOperand *MMO); 1137 SDValue* AllOps, SDUse *DynOps, unsigned NumOps, 1142 assert((DynOps || NumOps <= array_lengthof(Ops)) && 1144 InitOperands(DynOps ? DynOps : Ops, AllOps, NumOps); 1181 const SDValue *Ops, unsigned NumOps, 1136 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue* AllOps, SDUse *DynOps, unsigned NumOps, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 1180 MemIntrinsicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, const SDValue *Ops, unsigned NumOps, EVT MemoryVT, MachineMemOperand *MMO) argument 1640 CvtRndSatSDNode(EVT VT, unsigned Order, DebugLoc dl, const SDValue *Ops, unsigned NumOps, ISD::CvtCode Code) argument [all...] |
/freebsd-10-stable/contrib/llvm/utils/TableGen/ |
H A D | AsmWriterEmitter.cpp | 385 unsigned NumOps = NumInstOpsHandled[InstIdxs[i]]; 386 assert(NumOps <= Inst->Operands.size() && 389 Inst->Operands.begin()+NumOps); 732 unsigned NumOps = 0; 736 ++NumOps; 740 return NumOps; 744 unsigned NumOps = 0; 756 ++NumOps; 761 return NumOps;
|
H A D | CodeGenInstruction.cpp | 71 unsigned NumOps = 1; local 91 NumOps = NumArgs; 116 OperandType, MIOperandNo, NumOps, 118 MIOperandNo += NumOps;
|
/freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 338 const SDValue *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 348 const SDUse *Ops, unsigned NumOps) { 349 for (; NumOps; --NumOps, ++Ops) { 778 const SDValue *Ops,unsigned NumOps, 784 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 4193 SDVTList VTList, SDValue* Ops, unsigned NumOps, 4199 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 337 AddNodeIDOperands(FoldingSetNodeID &ID, const SDValue *Ops, unsigned NumOps) argument 347 AddNodeIDOperands(FoldingSetNodeID &ID, const SDUse *Ops, unsigned NumOps) argument 777 FindModifiedNodeSlot(SDNode *N, const SDValue *Ops,unsigned NumOps, void *&InsertPos) argument 4192 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTList, SDValue* Ops, unsigned NumOps, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 4371 getMergeValues(const SDValue *Ops, unsigned NumOps, SDLoc dl) argument 4385 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument 4397 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument 4420 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachineMemOperand *MMO) argument 4784 getNode(unsigned Opcode, SDLoc DL, EVT VT, const SDUse *Ops, unsigned NumOps) argument 4800 getNode(unsigned Opcode, SDLoc DL, EVT VT, const SDValue *Ops, unsigned NumOps) argument 4857 getNode(unsigned Opcode, SDLoc DL, ArrayRef<EVT> ResultTys, const SDValue *Ops, unsigned NumOps) argument 4864 getNode(unsigned Opcode, SDLoc DL, const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps) argument 4872 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, const SDValue *Ops, unsigned NumOps) argument 5147 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) argument 5226 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, const SDValue *Ops, unsigned NumOps) argument 5233 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, const SDValue *Ops, unsigned NumOps) argument 5246 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, const SDValue *Ops, unsigned NumOps) argument 5253 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps) argument 5294 SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs, const SDValue *Ops, unsigned NumOps) argument 5333 MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs, const SDValue *Ops, unsigned NumOps) argument 5542 unsigned NumOps = OpsArray.size(); local 5602 getNodeIfExists(unsigned Opcode, SDVTList VTList, const SDValue *Ops, unsigned NumOps) argument 6078 MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, const SDValue *Ops, unsigned NumOps, EVT memvt, MachineMemOperand *mmo) argument [all...] |
H A D | ScheduleDAGFast.cpp | 487 unsigned NumOps = Node->getNumOperands(); local 488 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) 489 --NumOps; // Ignore the glue operand. 491 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { 674 unsigned NumOps = N->getNumOperands(); local 675 if (unsigned NumLeft = NumOps) { 681 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) {
|
H A D | LegalizeTypes.cpp | 415 for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i) 1007 unsigned NumOps = N->getNumOperands(); local 1009 if (NumOps == 0) { 1012 } else if (NumOps == 1) { 1016 } else if (NumOps == 2) { 1021 SmallVector<SDValue, 8> Ops(NumOps); 1022 for (unsigned i = 0; i < NumOps; ++i) 1026 &Ops[0], NumOps, isSigned, dl).first;
|
H A D | InstrEmitter.cpp | 613 unsigned NumOps = Node->getNumOperands(); 614 assert((NumOps & 1) == 1 && 616 for (unsigned i = 1; i != NumOps; ++i) { 920 unsigned NumOps = Node->getNumOperands(); 921 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) 922 --NumOps; // Ignore the glue operand. 944 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
|
/freebsd-10-stable/contrib/llvm/lib/IR/ |
H A D | Instruction.cpp | 24 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument 26 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) { 38 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument 40 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
|
H A D | Instructions.cpp | 144 unsigned NumOps = e + e / 2; local 145 if (NumOps < 2) NumOps = 2; // 2 op PHI nodes are VERY common. 150 ReservedSpace = NumOps; 3364 unsigned NumOps = getNumOperands(); local 3368 if (2 + (idx + 1) * 2 != NumOps) { 3369 OL[2 + idx * 2] = OL[NumOps - 2]; 3370 OL[2 + idx * 2 + 1] = OL[NumOps - 1]; 3374 OL[NumOps-2].set(0); 3375 OL[NumOps 3384 unsigned NumOps = e*3; local 3427 unsigned NumOps = e*2; local [all...] |