/freebsd-10-stable/tools/tools/nanobsd/rescue/ |
H A D | merge.sh | 7 I64="/usr/obj/Rescue/rescue_${today}_x64.img"
|
/freebsd-10-stable/contrib/binutils/opcodes/ |
H A D | mips16-opc.c | 64 #define I64 INSN_ISA64 macro 237 {"sew", "x", 0xe8d1, 0xf8ff, WR_x|RD_x, 0, I64 }, 240 {"zew", "x", 0xe851, 0xf8ff, WR_x|RD_x, 0, I64 },
|
H A D | mips-opc.c | 88 #define I64 INSN_ISA64 macro 529 {"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 }, 530 {"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 }, 584 {"dmfc0", "t,+D", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I64 }, 585 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I64 }, 589 {"dmtc0", "t,+D", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I64 }, 590 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I64 }, 1409 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, 0, I64 }, 1412 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, 0, I64 },
|
/freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1611 I64, enumerator in enum:AtomicSz 1831 Opc = AtomicOpcTbl[Op][I64];
|
/freebsd-10-stable/contrib/llvm/tools/clang/lib/CodeGen/ |
H A D | TargetInfo.cpp | 4845 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 4863 ArgList.push_back(I64);
|
/freebsd-10-stable/contrib/binutils/gas/config/ |
H A D | tc-arm.c | 11824 "MOV I64, 0bAAAAAAAABBBB..." which uses OP = 1 despite being MOV not 16011 shl_imm should accept I8 I16 I32 I64, 16062 /* Add/sub take types I8 I16 I32 I64 F32. */ 16099 NUF(vsra, 0800110, 3, (RNDQ, oRNDQ, I64), neon_rshift_round_imm), 16100 NUF(vsraq, 0800110, 3, (RNQ, oRNQ, I64), neon_rshift_round_imm), 16101 NUF(vrsra, 0800310, 3, (RNDQ, oRNDQ, I64), neon_rshift_round_imm), 16102 NUF(vrsraq, 0800310, 3, (RNQ, oRNQ, I64), neon_rshift_round_imm), 16106 NUF(vsri, 1800410, 3, (RNDQ, oRNDQ, I64), neon_sri), 16107 NUF(vsriq, 1800410, 3, (RNQ, oRNQ, I64), neon_sri), 16118 /* Right shift narrowing. Types accepted I16 I32 I64 [all...] |