Searched refs:L1 (Results 1 - 7 of 7) sorted by relevance

/darwin-on-arm/xnu/libsyscall/custom/
H A D__fork.s56 jnc L1 // jump if CF==0
63 L1: label
82 jnc L1 // jump if CF==0
89 L1: label
H A D__vfork.s70 jnb L1 // jump if CF==0
77 L1: label
111 jnb L1 // jump if CF==0
119 L1: label
H A D__getpid.s118 L1: add r3, pc, r3 // r3 = &__current_pid label
143 .long __current_pid - (L1+8)
/darwin-on-arm/xnu/osfmk/i386/
H A Didle_pt.c53 #define L1(x,n) L0(x,n-1) L0(x,n) macro
54 #define L2(x,n) L1(x,n-2) L1(x,n)
H A Dcpuid.c76 L1, /* L1 (unified) cache */ enumerator in enum:__anon919
77 L1_INST, /* L1 Instruction cache */
78 L1_DATA, /* L1 Data cache */
158 { 0x60, CACHE, L1, 16*K, 8, 64 },
159 { 0x61, CACHE, L1, 4, 8*K, 64 },
160 { 0x62, CACHE, L1, 4, 16*K, 64 },
161 { 0x63, CACHE, L1, 4, 32*K, 64 },
/darwin-on-arm/xnu/osfmk/x86_64/
H A Dboot_pt.c72 #define L1(x,n) L0(x,n-1) L0(x,n) macro
73 #define L2(x,n) L1(x,n-2) L1(x,n)
/darwin-on-arm/xnu/osfmk/arm/armv/
H A Dcpufunc-v7.s289 mcr p15, 2, r0, c0, c0, 0 @ set cache level to L1
319 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 cache

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