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Searched refs:CPCICPLD_TIMING0 (Results 1 - 2 of 2) sorted by relevance

/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm1250cpci/include/
H A D	bcm1250cpci.h	`264 #define CPCICPLD_TIMING0 V_IO_ALE_WIDTH(4) \| \ macro`
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm1250cpci/src/
H A D	bcm1250cpci_init.S	`239 li t1,CPCICPLD_TIMING0`

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