Searched refs:rq (Results 1 - 13 of 13) sorted by relevance

/barrelfish-master/usr/drivers/dma/
H A Dqueue_manager.c95 errval_t dqm_alloc_by_id(queue_t type, uint64_t id, struct device_queue **rq) argument
115 *rq = q;
121 errval_t dqm_alloc_queue(queue_t type, struct device_queue **rq) argument
132 *rq = q;
/barrelfish-master/lib/devif/backends/net/mlx4/drivers/infiniband/hw/mthca/
H A Dmthca_qp.c210 return qp->queue.direct.buf + (n << qp->rq.wqe_shift);
212 return qp->queue.page_list[(n << qp->rq.wqe_shift) >> PAGE_SHIFT].buf +
213 ((n << qp->rq.wqe_shift) & (PAGE_SIZE - 1));
506 qp_attr->cap.max_recv_wr = qp->rq.max;
508 qp_attr->cap.max_recv_sge = qp->rq.max_gs;
605 if (qp->rq.max)
606 qp_context->rq_size_stride = ilog2(qp->rq.max) << 3;
607 qp_context->rq_size_stride |= qp->rq.wqe_shift - 4;
768 qp_context->rcv_db_index = cpu_to_be32(qp->rq.db_index);
837 mthca_wq_reset(&qp->rq);
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H A Dmthca_provider.h274 struct mthca_wq rq; member in struct:mthca_qp
H A Dmthca_provider.c593 qp->rq.db_index = ucmd.rq_db_index;
650 init_attr->cap.max_recv_wr = qp->rq.max;
652 init_attr->cap.max_recv_sge = qp->rq.max_gs;
668 to_mqp(qp)->rq.db_index);
H A Dmthca_cq.c551 wq = &(*cur_qp)->rq;
556 * with error instead of (rq size - 1) by Sinai FW 1.0.800 and
/barrelfish-master/include/arch/arm/machine/
H A Dsysreg.h293 #define CP15_CNTPCT(rq, rr) p15, 0, rq, rr, c14 /* Physical Count Register */
294 #define CP15_CNTVCT(rq, rr) p15, 1, rq, rr, c14 /* Virtual Count Register */
295 #define CP15_CNTP_CVAL(rq, rr) p15, 2, rq, rr, c14 /* PL1 Physical Timer Compare Value Register */
296 #define CP15_CNTV_CVAL(rq, rr) p15, 3, rq, rr, c14 /* Virtual Timer Compare Value Register */
297 #define CP15_CNTVOFF(rq, rr) p15, 4, rq, r
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/barrelfish-master/lib/devif/backends/net/mlx4/drivers/infiniband/hw/mlx4/
H A Dqp.c203 return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift));
394 qp->rq.wqe_cnt = qp->rq.max_gs = 0;
400 qp->rq.wqe_cnt = roundup_pow_of_two(max(1U, cap->max_recv_wr));
401 qp->rq.max_gs = roundup_pow_of_two(max(1U, cap->max_recv_sge));
402 qp->rq.wqe_shift = ilog2(
403 qp->rq.max_gs * sizeof(struct mlx4_wqe_data_seg));
408 cap->max_recv_wr = qp->rq.max_post = qp->rq
[all...]
H A Dcq.c677 wq = &(*cur_qp)->rq;
H A Dmlx4_ib.h296 struct mlx4_ib_wq rq; member in struct:mlx4_ib_qp
/barrelfish-master/lib/openssl-1.0.0d/apps/
H A Dx509.c199 X509_REQ *rq=NULL; local
997 rq=X509_to_X509_REQ(x,pk,digest);
999 if (rq == NULL)
1006 X509_REQ_print(out,rq);
1007 PEM_write_bio_X509_REQ(out,rq);
1084 X509_REQ_free(rq);
/barrelfish-master/lib/libc/rpc/
H A Dsvc_vc.c86 static bool_t svc_vc_control(SVCXPRT *xprt, const u_int rq, void *in);
87 static bool_t svc_vc_rendezvous_control (SVCXPRT *xprt, const u_int rq,
417 svc_vc_control(SVCXPRT *xprt, const u_int rq, void *in) argument
423 svc_vc_rendezvous_control(SVCXPRT *xprt, const u_int rq, void *in) argument
430 switch (rq) {
H A Dsvc_raw.c243 svc_raw_control(SVCXPRT *xprt, const u_int rq, void *in) argument
H A Dsvc_dg.c415 svc_dg_control(SVCXPRT *xprt, const u_int rq, void *in) argument

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