Searched refs:mtt (Results 1 - 21 of 21) sorted by relevance

/barrelfish-master/lib/devif/backends/net/mlx4/drivers/net/mlx4/
H A Dmr.c200 struct mlx4_mtt *mtt) {
205 mtt->order = -1;
206 mtt->page_shift = MLX4_ICM_PAGE_SHIFT;
209 mtt->page_shift = page_shift;
211 for (mtt->order = 0, i = 1; i < npages; i <<= 1)
212 ++mtt->order;
214 mtt->offset = mlx4_alloc_mtt_range(priv, mtt->order);
215 if (mtt->offset == -1) {
217 mtt
199 mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, struct mlx4_mtt *mtt) argument
269 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt) argument
515 mlx4_write_mtt_chunk(struct mlx4_priv *priv, struct mlx4_mtt *mtt, int start_index, int npages, u64 *page_list) argument
537 __mlx4_write_mtt(struct mlx4_priv *priv, struct mlx4_mtt *mtt, int start_index, int npages, u64 *page_list) argument
568 mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, int start_index, int npages, u64 *page_list) argument
612 mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, struct mlx4_buf *buf) argument
[all...]
H A Dresource_tracker.c108 struct res_mtt *mtt;
156 struct res_mtt *mtt;
168 struct res_mtt *mtt;
179 struct res_mtt *mtt;
191 struct res_mtt *mtt;
407 priv->dev.quotas.mtt = priv->dev.caps.num_mtts - priv->dev.caps.reserved_mtts;
418 priv->dev.quotas.mtt =
2453 int size, struct res_mtt *mtt)
2455 int res_start = mtt->com.res_id;
2456 int res_size = (1 << mtt
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H A Dqp.c103 static int __mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, argument
167 u64 mtt_addr = mlx4_mtt_addr(dev, mtt);
172 context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
210 int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, argument
214 return __mlx4_qp_modify(dev, mtt, cur_state, new_state, context, optpar,
580 int mlx4_qp_to_ready(struct mlx4_dev *dev, struct mlx4_mtt *mtt, argument
591 err = mlx4_qp_modify(dev, mtt, states[i], states[i + 1], context, 0, 0,
H A Dcq.c163 int entries, struct mlx4_mtt *mtt)
178 cq_context->log_page_size = mtt->page_shift - 12;
179 mtt_addr = mlx4_mtt_addr(dev, mtt);
279 int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, argument
319 cq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
321 mtt_addr = mlx4_mtt_addr(dev, mtt);
H A Den_cq.c148 err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt, &mdev->priv_uar,
H A Deq.c959 err = mlx4_mtt_init(&priv->dev, npages, PAGE_SHIFT, &eq->mtt);
963 err = mlx4_write_mtt(&priv->dev, &eq->mtt, 0, npages, dma_list);
974 /*printf("mtt_addr: %lx\n", mlx4_mtt_addr(&priv->dev, &eq->mtt));
975 printf("off: %d\n", eq->mtt.offset);
978 mtt_addr = mlx4_mtt_addr(&priv->dev, &eq->mtt);
996 err_out_free_mtt: /*mlx4_mtt_cleanup(&priv->dev, &eq->mtt);*/
1043 mlx4_mtt_cleanup(&priv->dev, &eq->mtt);
H A Dalloc.c418 &wqres->mtt);
422 err = mlx4_buf_write_mtt(dev, &wqres->mtt, &wqres->buf);
428 err_mtt: /*mlx4_mtt_cleanup(dev, &wqres->mtt);*/
440 mlx4_mtt_cleanup(dev, &wqres->mtt);
H A Den_rx.c865 /*ring->wqres.mtt.offset = 0xf0f0f;*/
867 err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, context, qp, state);
979 err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
H A Dmlx4.h395 struct mlx4_mtt mtt; member in struct:mlx4_eq
993 int __mlx4_write_mtt(struct mlx4_priv *priv, struct mlx4_mtt *mtt,
H A Den_netdev.c2016 priv->mdev->dev->offset = priv->rx_ring[0]->wqres.mtt.offset;
H A Den_tx.c262 err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, &ring->context,
/barrelfish-master/lib/devif/backends/net/mlx4/drivers/infiniband/hw/mthca/
H A Dmthca_mr.c211 struct mthca_mtt *mtt; local
217 mtt = kmalloc(sizeof *mtt, GFP_KERNEL);
218 if (!mtt)
221 mtt->buddy = buddy;
222 mtt->order = 0;
224 ++mtt->order;
226 mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy);
227 if (mtt
240 mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt) argument
254 __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, int start_index, u64 *buffer_list, int list_len) argument
322 mthca_tavor_write_mtt_seg(struct mthca_dev *dev, struct mthca_mtt *mtt, int start_index, u64 *buffer_list, int list_len) argument
336 mthca_arbel_write_mtt_seg(struct mthca_dev *dev, struct mthca_mtt *mtt, int start_index, u64 *buffer_list, int list_len) argument
361 mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, int start_index, u64 *buffer_list, int list_len) argument
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H A Dmthca_provider.h76 struct mthca_mtt *mtt; member in struct:mthca_mr
82 struct mthca_mtt *mtt; member in struct:mthca_fmr
H A Dmthca_provider.c1051 mr->mtt = mthca_alloc_mtt(dev, n);
1052 if (IS_ERR(mr->mtt)) {
1053 err = PTR_ERR(mr->mtt);
1078 err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
1088 err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
1103 mthca_free_mtt(dev, mr->mtt);
H A Dmthca_dev.h468 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
469 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
/barrelfish-master/lib/devif/backends/net/mlx4/drivers/infiniband/hw/mlx4/
H A Dsrq.c124 ilog2(srq->umem->page_size), &srq->mtt);
128 err = mlx4_ib_umem_write_mtt(dev, &srq->mtt, srq->umem);
164 &srq->mtt);
168 err = mlx4_buf_write_mtt(dev->dev, &srq->mtt, &srq->buf);
184 err = mlx4_srq_alloc(dev->dev, to_mpd(pd)->pdn, cqn, xrcdn, &srq->mtt,
209 mlx4_mtt_cleanup(dev->dev, &srq->mtt);
277 mlx4_mtt_cleanup(dev->dev, &msrq->mtt);
H A Dcq.c116 &buf->mtt);
120 err = mlx4_buf_write_mtt(dev->dev, &buf->mtt, &buf->buf);
127 err_mtt: /*mlx4_mtt_cleanup(dev->dev, &buf->mtt);*/
155 err = mlx4_mtt_init(dev->dev, n, shift, &buf->mtt);
160 err = mlx4_ib_umem_write_mtt(dev, &buf->mtt, *umem);
167 mlx4_mtt_cleanup(dev->dev, &buf->mtt);
234 err = mlx4_cq_alloc(dev->dev, entries, &cq->buf.mtt, uar, cq->db.dma,
254 /*err_mtt:*//*mlx4_mtt_cleanup(dev->dev, &cq->buf.mtt);*/
362 struct mlx4_mtt mtt;
399 mtt
[all...]
H A Dmlx4_ib.h112 struct mlx4_mtt mtt; member in struct:mlx4_ib_cq_buf
307 struct mlx4_mtt mtt; member in struct:mlx4_ib_qp
342 struct mlx4_mtt mtt; member in struct:mlx4_ib_srq
633 int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
H A Dqp.c959 err = mlx4_mtt_init(dev->dev, n, shift, &qp->mtt);
964 err = mlx4_ib_umem_write_mtt(dev, &qp->mtt, qp->umem);
1018 &qp->mtt);
1022 err = mlx4_buf_write_mtt(dev->dev, &qp->mtt, &qp->buf);
1080 err_mtt: /*mlx4_mtt_cleanup(dev->dev, &qp->mtt);*/
1236 mlx4_mtt_cleanup(dev->dev, &qp->mtt);
2053 err = mlx4_qp_modify(dev->dev, &qp->mtt, to_mlx4_state(cur_state),
/barrelfish-master/lib/devif/backends/net/mlx4/include/linux/mlx4/
H A Ddevice.h584 struct mlx4_mtt mtt; member in struct:mlx4_hwq_resources
589 struct mlx4_mtt mtt; member in struct:mlx4_mr
779 int mtt; member in struct:mlx4_quotas
1059 struct mlx4_mtt *mtt);
1061 void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt);
1063 u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt);
1076 int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, int start_index,
1078 int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
1092 int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
1108 struct mlx4_mtt *mtt, u6
[all...]
H A Dqp.h428 int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
436 int mlx4_qp_to_ready(struct mlx4_dev *dev, struct mlx4_mtt *mtt,

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