Searched refs:xtRegisterTypeSpecialReg (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/gdb/
H A Dxtensa-config.c286 { /* 0064 */ "lbeg", 256, xtRegisterTypeSpecialReg, 0x1100, 0,
289 { /* 0065 */ "lend", 260, xtRegisterTypeSpecialReg, 0x1100, 0,
292 { /* 0066 */ "lcount", 264, xtRegisterTypeSpecialReg, 0x1100, 0,
295 { /* 0067 */ "ptevaddr", 268, xtRegisterTypeSpecialReg, 0x1000, 0,
298 { /* 0068 */ "ddr", 272, xtRegisterTypeSpecialReg, 0x1000, 0,
301 { /* 0069 */ "interrupt", 276, xtRegisterTypeSpecialReg, 0x1000, 0,
304 { /* 0070 */ "intset", 280, xtRegisterTypeSpecialReg, 0x1000, 0,
307 { /* 0071 */ "intclear", 284, xtRegisterTypeSpecialReg, 0x1000, 0,
310 { /* 0072 */ "ccount", 288, xtRegisterTypeSpecialReg, 0x1000, 0,
313 { /* 0073 */ "prid", 292, xtRegisterTypeSpecialReg,
[all...]
H A Dxtensa-tdep.h31 xtRegisterTypeSpecialReg, /* CPU states, such as PS, Booleans, (rsr). */ enumerator in enum:__anon2123
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/gdb/
H A Dxtensa-config.c286 { /* 0064 */ "lbeg", 256, xtRegisterTypeSpecialReg, 0x1100, 0,
289 { /* 0065 */ "lend", 260, xtRegisterTypeSpecialReg, 0x1100, 0,
292 { /* 0066 */ "lcount", 264, xtRegisterTypeSpecialReg, 0x1100, 0,
295 { /* 0067 */ "ptevaddr", 268, xtRegisterTypeSpecialReg, 0x1000, 0,
298 { /* 0068 */ "ddr", 272, xtRegisterTypeSpecialReg, 0x1000, 0,
301 { /* 0069 */ "interrupt", 276, xtRegisterTypeSpecialReg, 0x1000, 0,
304 { /* 0070 */ "intset", 280, xtRegisterTypeSpecialReg, 0x1000, 0,
307 { /* 0071 */ "intclear", 284, xtRegisterTypeSpecialReg, 0x1000, 0,
310 { /* 0072 */ "ccount", 288, xtRegisterTypeSpecialReg, 0x1000, 0,
313 { /* 0073 */ "prid", 292, xtRegisterTypeSpecialReg,
[all...]
H A Dxtensa-tdep.h31 xtRegisterTypeSpecialReg, /* CPU states, such as PS, Booleans, (rsr). */ enumerator in enum:__anon3028
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/gdb/
H A Dxtensa-config.c286 { /* 0064 */ "lbeg", 256, xtRegisterTypeSpecialReg, 0x1100, 0,
289 { /* 0065 */ "lend", 260, xtRegisterTypeSpecialReg, 0x1100, 0,
292 { /* 0066 */ "lcount", 264, xtRegisterTypeSpecialReg, 0x1100, 0,
295 { /* 0067 */ "ptevaddr", 268, xtRegisterTypeSpecialReg, 0x1000, 0,
298 { /* 0068 */ "ddr", 272, xtRegisterTypeSpecialReg, 0x1000, 0,
301 { /* 0069 */ "interrupt", 276, xtRegisterTypeSpecialReg, 0x1000, 0,
304 { /* 0070 */ "intset", 280, xtRegisterTypeSpecialReg, 0x1000, 0,
307 { /* 0071 */ "intclear", 284, xtRegisterTypeSpecialReg, 0x1000, 0,
310 { /* 0072 */ "ccount", 288, xtRegisterTypeSpecialReg, 0x1000, 0,
313 { /* 0073 */ "prid", 292, xtRegisterTypeSpecialReg,
[all...]
H A Dxtensa-tdep.h31 xtRegisterTypeSpecialReg, /* CPU states, such as PS, Booleans, (rsr). */ enumerator in enum:__anon37053

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