Searched refs:write_map (Results 1 - 25 of 39) sorted by relevance

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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/common/
H A Dsim-hrw.c38 return sim_core_write_buffer (sd, NULL, write_map,
H A Dsim-basics.h72 write_map = 1, enumerator in enum:__anon3567
81 access_write = 1 << write_map,
H A Dcgen-mem.h70 XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
149 XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
H A Dsim-utils.c360 case write_map: return "write";
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/common/
H A Dsim-hrw.c38 return sim_core_write_buffer (sd, NULL, write_map,
H A Dsim-basics.h72 write_map = 1, enumerator in enum:__anon2662
81 access_write = 1 << write_map,
H A Dcgen-mem.h70 XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
149 XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
H A Dsim-utils.c360 case write_map: return "write";
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/common/
H A Dsim-hrw.c38 return sim_core_write_buffer (sd, NULL, write_map,
H A Dsim-basics.h72 write_map = 1, enumerator in enum:__anon37592
81 access_write = 1 << write_map,
H A Dcgen-mem.h70 XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
149 XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
H A Dsim-utils.c360 case write_map: return "write";
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/mips/
H A Dsim-main.c298 sim_core_write_aligned_16 (CPU, cia, write_map, pAddr, val);
302 sim_core_write_aligned_8 (CPU, cia, write_map, pAddr, MemElem);
305 sim_core_write_misaligned_7 (CPU, cia, write_map, pAddr, MemElem);
308 sim_core_write_misaligned_6 (CPU, cia, write_map, pAddr, MemElem);
311 sim_core_write_misaligned_5 (CPU, cia, write_map, pAddr, MemElem);
314 sim_core_write_aligned_4 (CPU, cia, write_map, pAddr, MemElem);
317 sim_core_write_misaligned_3 (CPU, cia, write_map, pAddr, MemElem);
320 sim_core_write_aligned_2 (CPU, cia, write_map, pAddr, MemElem);
323 sim_core_write_aligned_1 (CPU, cia, write_map, pAddr, MemElem);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/mips/
H A Dsim-main.c298 sim_core_write_aligned_16 (CPU, cia, write_map, pAddr, val);
302 sim_core_write_aligned_8 (CPU, cia, write_map, pAddr, MemElem);
305 sim_core_write_misaligned_7 (CPU, cia, write_map, pAddr, MemElem);
308 sim_core_write_misaligned_6 (CPU, cia, write_map, pAddr, MemElem);
311 sim_core_write_misaligned_5 (CPU, cia, write_map, pAddr, MemElem);
314 sim_core_write_aligned_4 (CPU, cia, write_map, pAddr, MemElem);
317 sim_core_write_misaligned_3 (CPU, cia, write_map, pAddr, MemElem);
320 sim_core_write_aligned_2 (CPU, cia, write_map, pAddr, MemElem);
323 sim_core_write_aligned_1 (CPU, cia, write_map, pAddr, MemElem);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/mips/
H A Dsim-main.c298 sim_core_write_aligned_16 (CPU, cia, write_map, pAddr, val);
302 sim_core_write_aligned_8 (CPU, cia, write_map, pAddr, MemElem);
305 sim_core_write_misaligned_7 (CPU, cia, write_map, pAddr, MemElem);
308 sim_core_write_misaligned_6 (CPU, cia, write_map, pAddr, MemElem);
311 sim_core_write_misaligned_5 (CPU, cia, write_map, pAddr, MemElem);
314 sim_core_write_aligned_4 (CPU, cia, write_map, pAddr, MemElem);
317 sim_core_write_misaligned_3 (CPU, cia, write_map, pAddr, MemElem);
320 sim_core_write_aligned_2 (CPU, cia, write_map, pAddr, MemElem);
323 sim_core_write_aligned_1 (CPU, cia, write_map, pAddr, MemElem);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/mn10300/
H A Dmn10300_sim.h220 PC, write_map, (ADDR), (DATA))
225 PC, write_map, (ADDR), (DATA))
230 PC, write_map, (ADDR), (DATA))
233 PC, write_map, (ADDR), dw2u64 (DATA))
H A Dop_utils.c161 return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/mn10300/
H A Dmn10300_sim.h220 PC, write_map, (ADDR), (DATA))
225 PC, write_map, (ADDR), (DATA))
230 PC, write_map, (ADDR), (DATA))
233 PC, write_map, (ADDR), dw2u64 (DATA))
H A Dop_utils.c161 return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/mn10300/
H A Dmn10300_sim.h220 PC, write_map, (ADDR), (DATA))
225 PC, write_map, (ADDR), (DATA))
230 PC, write_map, (ADDR), (DATA))
233 PC, write_map, (ADDR), dw2u64 (DATA))
H A Dop_utils.c161 return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/m32r/
H A Dtraps.c115 return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/m32r/
H A Dtraps.c115 return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/m32r/
H A Dtraps.c115 return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/v850/
H A Dsim-main.h205 PC, write_map, (ADDR), (DATA))

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