Searched refs:vulp (Results 1 - 22 of 22) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/alpha/kernel/
H A Dcore_t2.c192 t2_cfg = *(vulp)T2_HAE_3 & ~0xc0000000UL;
193 *(vulp)T2_HAE_3 = 0x40000000UL | t2_cfg;
227 *(vulp)T2_HAE_3 = t2_cfg;
244 t2_cfg = *(vulp)T2_HAE_3 & ~0xc0000000UL;
245 *(vulp)T2_HAE_3 = t2_cfg | 0x40000000UL;
278 *(vulp)T2_HAE_3 = t2_cfg;
335 *(vulp)T2_WBASE1 = temp | 0x80000UL; /* OR in ENABLE bit */
337 *(vulp)T2_WMASK1 = temp;
338 *(vulp)T2_TBASE1 = 0;
342 __func__, *(vulp)T2_WBASE
[all...]
H A Dirq_pyxis.c26 *(vulp)PYXIS_INT_MASK = mask;
28 *(vulp)PYXIS_INT_MASK;
64 *(vulp)PYXIS_INT_MASK = mask;
67 *(vulp)PYXIS_INT_REQ = bit;
70 *(vulp)PYXIS_INT_MASK;
90 pld = *(vulp)PYXIS_INT_REQ;
112 *(vulp)PYXIS_INT_MASK = 0; /* disable all */
113 *(vulp)PYXIS_INT_REQ = -1; /* flush all */
H A Dcore_lca.c117 *(vulp)LCA_IOC_CONF = 0;
121 *(vulp)LCA_IOC_CONF = 1;
137 stat0 = *(vulp)LCA_IOC_STAT0;
138 *(vulp)LCA_IOC_STAT0 = stat0;
145 stat0 = *(vulp)LCA_IOC_STAT0;
154 *(vulp)LCA_IOC_STAT0 = stat0;
174 stat0 = *(vulp)LCA_IOC_STAT0;
175 *(vulp)LCA_IOC_STAT0 = stat0;
182 stat0 = *(vulp)LCA_IOC_STAT0;
191 *(vulp)LCA_IOC_STAT
[all...]
H A Dsys_ruffian.c41 *(vulp)PYXIS_INT_HILO = 0x000000c0UL; mb();
42 *(vulp)PYXIS_INT_CNFG = 0x00002064UL; mb(); /* all clear */
184 bank = *(vulp)bank_addr;
H A Dsys_sable.c299 *(vulp)T2_AIR = 0x40;
301 *(vulp)T2_AIR; /* re-read to force write */
303 *(vulp)T2_DIR = mask;
311 *(vulp)T2_VAR = (u_long) bit;
H A Dproto.h12 #define vulp volatile unsigned long * macro
H A Dcore_cia.c781 pyxis_cc = *(vulp)PYXIS_RT_COUNT;
782 do { } while(*(vulp)PYXIS_RT_COUNT - pyxis_cc < 4096);
H A Dsetup.c1380 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL);
1412 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/alpha/kernel/
H A Dcore_t2.c192 t2_cfg = *(vulp)T2_HAE_3 & ~0xc0000000UL;
193 *(vulp)T2_HAE_3 = 0x40000000UL | t2_cfg;
227 *(vulp)T2_HAE_3 = t2_cfg;
244 t2_cfg = *(vulp)T2_HAE_3 & ~0xc0000000UL;
245 *(vulp)T2_HAE_3 = t2_cfg | 0x40000000UL;
278 *(vulp)T2_HAE_3 = t2_cfg;
335 *(vulp)T2_WBASE1 = temp | 0x80000UL; /* OR in ENABLE bit */
337 *(vulp)T2_WMASK1 = temp;
338 *(vulp)T2_TBASE1 = 0;
342 __func__, *(vulp)T2_WBASE
[all...]
H A Dirq_pyxis.c26 *(vulp)PYXIS_INT_MASK = mask;
28 *(vulp)PYXIS_INT_MASK;
64 *(vulp)PYXIS_INT_MASK = mask;
67 *(vulp)PYXIS_INT_REQ = bit;
70 *(vulp)PYXIS_INT_MASK;
90 pld = *(vulp)PYXIS_INT_REQ;
112 *(vulp)PYXIS_INT_MASK = 0; /* disable all */
113 *(vulp)PYXIS_INT_REQ = -1; /* flush all */
H A Dcore_lca.c117 *(vulp)LCA_IOC_CONF = 0;
121 *(vulp)LCA_IOC_CONF = 1;
137 stat0 = *(vulp)LCA_IOC_STAT0;
138 *(vulp)LCA_IOC_STAT0 = stat0;
145 stat0 = *(vulp)LCA_IOC_STAT0;
154 *(vulp)LCA_IOC_STAT0 = stat0;
174 stat0 = *(vulp)LCA_IOC_STAT0;
175 *(vulp)LCA_IOC_STAT0 = stat0;
182 stat0 = *(vulp)LCA_IOC_STAT0;
191 *(vulp)LCA_IOC_STAT
[all...]
H A Dsys_ruffian.c41 *(vulp)PYXIS_INT_HILO = 0x000000c0UL; mb();
42 *(vulp)PYXIS_INT_CNFG = 0x00002064UL; mb(); /* all clear */
184 bank = *(vulp)bank_addr;
H A Dsys_sable.c299 *(vulp)T2_AIR = 0x40;
301 *(vulp)T2_AIR; /* re-read to force write */
303 *(vulp)T2_DIR = mask;
311 *(vulp)T2_VAR = (u_long) bit;
H A Dproto.h12 #define vulp volatile unsigned long * macro
H A Dcore_cia.c781 pyxis_cc = *(vulp)PYXIS_RT_COUNT;
782 do { } while(*(vulp)PYXIS_RT_COUNT - pyxis_cc < 4096);
H A Dsetup.c1380 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL);
1412 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/alpha/include/asm/
H A Dcore_lca.h220 #define vulp volatile unsigned long __force * macro
343 #undef vulp macro
H A Dcore_apecs.h326 #define vulp volatile unsigned long __force * macro
450 #undef vulp macro
H A Dcore_cia.h342 #define vulp volatile unsigned long __force * macro
466 #undef vulp macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/alpha/include/asm/
H A Dcore_lca.h220 #define vulp volatile unsigned long __force * macro
343 #undef vulp macro
H A Dcore_apecs.h326 #define vulp volatile unsigned long __force * macro
450 #undef vulp macro
H A Dcore_cia.h342 #define vulp volatile unsigned long __force * macro
466 #undef vulp macro

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