Searched refs:unsigned_2 (Results 1 - 24 of 24) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/common/
H A Dsim-endian.h30 INLINE_SIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
36 INLINE_SIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
42 INLINE_SIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
48 INLINE_SIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
54 INLINE_SIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2
[all...]
H A Dsim-types.h145 typedef unsigned16 unsigned_2; typedef
H A Dsim-profile.c494 case 2: pc = *(unsigned_2*)(STATE_WATCHPOINTS (sd)->pc) ; break;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/common/
H A Dsim-endian.h30 INLINE_SIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
36 INLINE_SIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
42 INLINE_SIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
48 INLINE_SIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
54 INLINE_SIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2
[all...]
H A Dsim-types.h145 typedef unsigned16 unsigned_2; typedef
H A Dsim-profile.c494 case 2: pc = *(unsigned_2*)(STATE_WATCHPOINTS (sd)->pc) ; break;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/common/
H A Dsim-endian.h30 INLINE_SIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
36 INLINE_SIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
42 INLINE_SIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
48 INLINE_SIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
54 INLINE_SIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2
[all...]
H A Dsim-types.h145 typedef unsigned16 unsigned_2; typedef
H A Dsim-profile.c494 case 2: pc = *(unsigned_2*)(STATE_WATCHPOINTS (sd)->pc) ; break;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/ppc/
H A Dsim-endian.h29 INLINE_PSIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
34 INLINE_PSIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
39 INLINE_PSIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
44 INLINE_PSIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
49 INLINE_PSIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2
[all...]
H A Dwords.h89 typedef unsigned16 unsigned_2; typedef
H A Demul_bugapi.c400 unsigned_2 status;
403 unsigned_2 blk_cnt;
H A Dpsim.c893 *(unsigned_2*)buf = H2T_2(*(unsigned_2*)cooked_buf);
972 *(unsigned_2*)cooked_buf = T2H_2(*(unsigned_2*)buf);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/ppc/
H A Dsim-endian.h29 INLINE_PSIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
34 INLINE_PSIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
39 INLINE_PSIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
44 INLINE_PSIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
49 INLINE_PSIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2
[all...]
H A Dwords.h89 typedef unsigned16 unsigned_2; typedef
H A Demul_bugapi.c400 unsigned_2 status;
403 unsigned_2 blk_cnt;
H A Dpsim.c893 *(unsigned_2*)buf = H2T_2(*(unsigned_2*)cooked_buf);
972 *(unsigned_2*)cooked_buf = T2H_2(*(unsigned_2*)buf);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/ppc/
H A Dsim-endian.h29 INLINE_PSIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
34 INLINE_PSIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
39 INLINE_PSIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
44 INLINE_PSIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
49 INLINE_PSIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2
[all...]
H A Dwords.h89 typedef unsigned16 unsigned_2; typedef
H A Demul_bugapi.c400 unsigned_2 status;
403 unsigned_2 blk_cnt;
H A Dpsim.c893 *(unsigned_2*)buf = H2T_2(*(unsigned_2*)cooked_buf);
972 *(unsigned_2*)cooked_buf = T2H_2(*(unsigned_2*)buf);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/d10v/
H A Dd10v_sim.h89 unsigned_2 _2;
116 SLOT[SLOT_NR].data._2 = (unsigned_2) (VAL); \
117 SLOT[SLOT_NR].mask._2 = (unsigned_2) (MSK); \
146 *(unsigned_2*) SLOT[i].dest &= SLOT[i].mask._2; \
147 *(unsigned_2*) SLOT[i].dest |= SLOT[i].data._2; \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/d10v/
H A Dd10v_sim.h89 unsigned_2 _2;
116 SLOT[SLOT_NR].data._2 = (unsigned_2) (VAL); \
117 SLOT[SLOT_NR].mask._2 = (unsigned_2) (MSK); \
146 *(unsigned_2*) SLOT[i].dest &= SLOT[i].mask._2; \
147 *(unsigned_2*) SLOT[i].dest |= SLOT[i].data._2; \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/d10v/
H A Dd10v_sim.h89 unsigned_2 _2;
116 SLOT[SLOT_NR].data._2 = (unsigned_2) (VAL); \
117 SLOT[SLOT_NR].mask._2 = (unsigned_2) (MSK); \
146 *(unsigned_2*) SLOT[i].dest &= SLOT[i].mask._2; \
147 *(unsigned_2*) SLOT[i].dest |= SLOT[i].data._2; \

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