Searched refs:type1_regs (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/v850/
H A Dsim-main.h386 extern int type1_regs[];
H A Dsimops.c40 int type1_regs[12] = { 27, 26, 25, 24, 31, 30, 29, 28, 23, 22, 0, 21 }; variable
2476 if ((OP[3] & (1 << type1_regs[ i ])))
2501 if ((OP[3] & (1 << type1_regs[ i ])))
2526 if ((OP[3] & (1 << type1_regs[ i ])))
2551 if ((OP[3] & (1 << type1_regs[ i ])))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/v850/
H A Dsim-main.h386 extern int type1_regs[];
H A Dsimops.c40 int type1_regs[12] = { 27, 26, 25, 24, 31, 30, 29, 28, 23, 22, 0, 21 }; variable
2476 if ((OP[3] & (1 << type1_regs[ i ])))
2501 if ((OP[3] & (1 << type1_regs[ i ])))
2526 if ((OP[3] & (1 << type1_regs[ i ])))
2551 if ((OP[3] & (1 << type1_regs[ i ])))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/v850/
H A Dsim-main.h386 extern int type1_regs[];
H A Dsimops.c40 int type1_regs[12] = { 27, 26, 25, 24, 31, 30, 29, 28, 23, 22, 0, 21 }; variable
2476 if ((OP[3] & (1 << type1_regs[ i ])))
2501 if ((OP[3] & (1 << type1_regs[ i ])))
2526 if ((OP[3] & (1 << type1_regs[ i ])))
2551 if ((OP[3] & (1 << type1_regs[ i ])))

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