Searched refs:timer_regs (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/kernel/
H A Dgptimers.c44 static volatile GPTIMER_timer_regs *const timer_regs[MAX_BLACKFIN_GPTIMERS] = variable
143 timer_regs[timer_id]->width = value;
151 return timer_regs[timer_id]->width;
158 timer_regs[timer_id]->period = period;
166 return timer_regs[timer_id]->period;
173 return timer_regs[timer_id]->counter;
230 timer_regs[timer_id]->config = config;
238 return timer_regs[timer_id]->config;
286 timer_regs[timer_id]->config |= TIMER_PULSE_HI;
294 timer_regs[timer_i
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/arch-v32/kernel/
H A Dtime.c63 unsigned long timer_regs[NR_CPUS] = variable
198 masked_intr = REG_RD(timer, timer_regs[cpu], r_masked_intr);
204 REG_WR(timer, timer_regs[cpu], rw_ack_intr, ack_intr);
249 REG_WR(timer, timer_regs[cpu], rw_tmr0_div, tmr0_div);
250 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Load */
252 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Start */
255 timer_intr_mask = REG_RD(timer, timer_regs[cpu], rw_intr_mask);
257 REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask);
323 data = REG_RD(timer, timer_regs[freqs->cpu],
326 REG_WR(timer, timer_regs[freq
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/kernel/
H A Dgptimers.c44 static volatile GPTIMER_timer_regs *const timer_regs[MAX_BLACKFIN_GPTIMERS] = variable
143 timer_regs[timer_id]->width = value;
151 return timer_regs[timer_id]->width;
158 timer_regs[timer_id]->period = period;
166 return timer_regs[timer_id]->period;
173 return timer_regs[timer_id]->counter;
230 timer_regs[timer_id]->config = config;
238 return timer_regs[timer_id]->config;
286 timer_regs[timer_id]->config |= TIMER_PULSE_HI;
294 timer_regs[timer_i
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v32/kernel/
H A Dtime.c63 unsigned long timer_regs[NR_CPUS] = variable
198 masked_intr = REG_RD(timer, timer_regs[cpu], r_masked_intr);
204 REG_WR(timer, timer_regs[cpu], rw_ack_intr, ack_intr);
249 REG_WR(timer, timer_regs[cpu], rw_tmr0_div, tmr0_div);
250 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Load */
252 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Start */
255 timer_intr_mask = REG_RD(timer, timer_regs[cpu], rw_intr_mask);
257 REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask);
323 data = REG_RD(timer, timer_regs[freqs->cpu],
326 REG_WR(timer, timer_regs[freq
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/include/arch-v32/arch/hwregs/
H A DMakefile64 REGDESC += $(BASEDIR)/io/timer/rtl/timer_regs.r
143 timer_defs.h: $(BASEDIR)/io/timer/rtl/timer_regs.r
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/include/arch-v32/arch/hwregs/
H A DMakefile64 REGDESC += $(BASEDIR)/io/timer/rtl/timer_regs.r
143 timer_defs.h: $(BASEDIR)/io/timer/rtl/timer_regs.r

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