Searched refs:timer_base (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-mxc/
H A Dtime.c72 static void __iomem *timer_base; variable
79 __raw_writel(0, timer_base + V2_IR);
81 tmp = __raw_readl(timer_base + MXC_TCTL);
82 __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL);
89 __raw_writel(1<<0, timer_base + V2_IR);
91 __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN,
92 timer_base + MXC_TCTL);
100 __raw_writel(0, timer_base + MX1_2_TSTAT);
103 timer_base + MX1_2_TSTAT);
105 __raw_writel(V2_TSTAT_OF1, timer_base
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-mxc/
H A Dtime.c72 static void __iomem *timer_base; variable
79 __raw_writel(0, timer_base + V2_IR);
81 tmp = __raw_readl(timer_base + MXC_TCTL);
82 __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL);
89 __raw_writel(1<<0, timer_base + V2_IR);
91 __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN,
92 timer_base + MXC_TCTL);
100 __raw_writel(0, timer_base + MX1_2_TSTAT);
103 timer_base + MX1_2_TSTAT);
105 __raw_writel(V2_TSTAT_OF1, timer_base
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/msm/
H A Dmdp_dma_lcdc.c97 uint32 timer_base = LCDC_BASE; local
231 timer_base = DTV_BASE;
249 MDP_OUTP(MDP_BASE + timer_base + 0x4, hsync_ctrl);
250 MDP_OUTP(MDP_BASE + timer_base + 0x8, vsync_period);
251 MDP_OUTP(MDP_BASE + timer_base + 0xc, vsync_pulse_width * hsync_period);
252 if (timer_base == LCDC_BASE) {
253 MDP_OUTP(MDP_BASE + timer_base + 0x10, display_hctl);
254 MDP_OUTP(MDP_BASE + timer_base + 0x14, display_v_start);
255 MDP_OUTP(MDP_BASE + timer_base + 0x18, display_v_end);
256 MDP_OUTP(MDP_BASE + timer_base
292 uint32 timer_base = LCDC_BASE; local
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/msm/
H A Dmdp_dma_lcdc.c97 uint32 timer_base = LCDC_BASE; local
231 timer_base = DTV_BASE;
249 MDP_OUTP(MDP_BASE + timer_base + 0x4, hsync_ctrl);
250 MDP_OUTP(MDP_BASE + timer_base + 0x8, vsync_period);
251 MDP_OUTP(MDP_BASE + timer_base + 0xc, vsync_pulse_width * hsync_period);
252 if (timer_base == LCDC_BASE) {
253 MDP_OUTP(MDP_BASE + timer_base + 0x10, display_hctl);
254 MDP_OUTP(MDP_BASE + timer_base + 0x14, display_v_start);
255 MDP_OUTP(MDP_BASE + timer_base + 0x18, display_v_end);
256 MDP_OUTP(MDP_BASE + timer_base
292 uint32 timer_base = LCDC_BASE; local
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/sound/pci/ctxfi/
H A Dcttimer.c35 struct ct_timer *timer_base; member in struct:ct_timer_instance
295 struct ct_timer *atimer = ti->timer_base;
310 struct ct_timer *atimer = ti->timer_base;
348 ti->timer_base = atimer;
363 if (ti->timer_base->ops->prepare)
364 ti->timer_base->ops->prepare(ti);
371 struct ct_timer *atimer = ti->timer_base;
377 struct ct_timer *atimer = ti->timer_base;
383 struct ct_timer *atimer = ti->timer_base;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/sound/pci/ctxfi/
H A Dcttimer.c35 struct ct_timer *timer_base; member in struct:ct_timer_instance
295 struct ct_timer *atimer = ti->timer_base;
310 struct ct_timer *atimer = ti->timer_base;
348 ti->timer_base = atimer;
363 if (ti->timer_base->ops->prepare)
364 ti->timer_base->ops->prepare(ti);
371 struct ct_timer *atimer = ti->timer_base;
377 struct ct_timer *atimer = ti->timer_base;
383 struct ct_timer *atimer = ti->timer_base;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/comedi/drivers/
H A Ddt3000.c330 static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *arg,
598 static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *nanosec, argument
607 base = timer_base * (prescale + 1);
627 base = timer_base * (1 << prescale);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/comedi/drivers/
H A Ddt3000.c330 static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *arg,
598 static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *nanosec, argument
607 base = timer_base * (prescale + 1);
627 base = timer_base * (1 << prescale);

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