Searched refs:subdid (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/octeon/
H A Dcvmx-address.h222 #define CVMX_FULL_DID(did, subdid) (((did) << 3) | (subdid))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/octeon/
H A Dcvmx-address.h222 #define CVMX_FULL_DID(did, subdid) (((did) << 3) | (subdid))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/pci/
H A Dpci-octeon.c25 * Octeon's PCI controller uses did=3, subdid=2 for PCI IO
32 /* Octeon't PCI controller uses did=3, subdid=3 for PCI memory. */
45 uint64_t subdid:3; member in struct:octeon_pci_address::__anon13676
268 pci_addr.s.subdid = 1;
305 pci_addr.s.subdid = 1;
H A Dpcie-octeon.c30 uint64_t subdid:3; /* PCIe SubDID = 1 */ member in struct:cvmx_pcie_address::__anon13677
61 uint64_t subdid:3; /* PCIe SubDID = 2 */ member in struct:cvmx_pcie_address::__anon13678
72 uint64_t subdid:3; /* PCIe SubDID = 3-6 */ member in struct:cvmx_pcie_address::__anon13679
93 pcie_addr.io.subdid = 2;
127 pcie_addr.mem.subdid = 3 + pcie_port;
207 pcie_addr.config.subdid = 1;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/pci/
H A Dpci-octeon.c25 * Octeon's PCI controller uses did=3, subdid=2 for PCI IO
32 /* Octeon't PCI controller uses did=3, subdid=3 for PCI memory. */
45 uint64_t subdid:3; member in struct:octeon_pci_address::__anon25369
268 pci_addr.s.subdid = 1;
305 pci_addr.s.subdid = 1;
H A Dpcie-octeon.c30 uint64_t subdid:3; /* PCIe SubDID = 1 */ member in struct:cvmx_pcie_address::__anon25370
61 uint64_t subdid:3; /* PCIe SubDID = 2 */ member in struct:cvmx_pcie_address::__anon25371
72 uint64_t subdid:3; /* PCIe SubDID = 3-6 */ member in struct:cvmx_pcie_address::__anon25372
93 pcie_addr.io.subdid = 2;
127 pcie_addr.mem.subdid = 3 + pcie_port;
207 pcie_addr.config.subdid = 1;

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