Searched refs:mode_reg (Results 1 - 25 of 54) sorted by relevance

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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-spear/
H A Dpadmux.c23 * mode_reg: mode configurations
29 struct pmx_reg mode_reg; member in struct:pmx
52 val = readl(pmx->base + pmx->mode_reg.offset);
53 val &= ~pmx->mode_reg.mask;
54 val |= mode->mask & pmx->mode_reg.mask;
55 writel(val, pmx->base + pmx->mode_reg.offset);
145 pmx->mode_reg.offset = driver->mode_reg.offset;
146 pmx->mode_reg.mask = driver->mode_reg
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-spear/
H A Dpadmux.c23 * mode_reg: mode configurations
29 struct pmx_reg mode_reg; member in struct:pmx
52 val = readl(pmx->base + pmx->mode_reg.offset);
53 val &= ~pmx->mode_reg.mask;
54 val |= mode->mask & pmx->mode_reg.mask;
55 writel(val, pmx->base + pmx->mode_reg.offset);
145 pmx->mode_reg.offset = driver->mode_reg.offset;
146 pmx->mode_reg.mask = driver->mode_reg
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-spear/include/plat/
H A Dpadmux.h77 * mode_reg: structure of mode config register
85 struct pmx_reg mode_reg; member in struct:pmx_driver
H A Dclock.h97 unsigned int *mode_reg; member in struct:pll_clk_config
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-spear/include/plat/
H A Dpadmux.h77 * mode_reg: structure of mode config register
85 struct pmx_reg mode_reg; member in struct:pmx_driver
H A Dclock.h97 unsigned int *mode_reg; member in struct:pll_clk_config
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/atm/
H A DuPD98402.c100 unsigned char mode_reg; local
102 mode_reg = GET(MDR) & ~(uPD98402_MDR_TPLP | uPD98402_MDR_ALP |
108 mode_reg |= uPD98402_MDR_TPLP;
111 mode_reg |= uPD98402_MDR_ALP;
120 mode_reg |= uPD98402_MDR_RPLP;
125 PUT(mode_reg,MDR);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/atm/
H A DuPD98402.c100 unsigned char mode_reg; local
102 mode_reg = GET(MDR) & ~(uPD98402_MDR_TPLP | uPD98402_MDR_ALP |
108 mode_reg |= uPD98402_MDR_TPLP;
111 mode_reg |= uPD98402_MDR_ALP;
120 mode_reg |= uPD98402_MDR_RPLP;
125 PUT(mode_reg,MDR);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/include/video/
H A Dw100fb.h64 unsigned long mode_reg; member in struct:w100_bm_mem_info
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/include/video/
H A Dw100fb.h64 unsigned long mode_reg; member in struct:w100_bm_mem_info
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/gpu/drm/nouveau/
H A Dnv04_dfp.c93 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
119 fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control;
134 fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control;
203 struct nv04_mode_state *state = &dev_priv->mode_reg;
248 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
289 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
456 dev_priv->mode_reg.crtc_reg[head].fp_control =
552 dev_priv->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK);
553 dev_priv->mode_reg.sel_clk &= ~0xf0;
555 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg
[all...]
H A Dnv04_cursor.c42 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
H A Dnv04_tv.c69 struct nv04_mode_state *state = &dev_priv->mode_reg;
98 struct nv04_crtc_reg *state = &dev_priv->mode_reg.crtc_reg[head];
140 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
H A Dnv04_crtc.c52 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
67 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
107 struct nv04_mode_state *state = &dev_priv->mode_reg;
234 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
439 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
596 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg.sel_clk);
606 struct nv04_mode_state *state = &dev_priv->mode_reg;
668 nouveau_hw_load_state(dev, nv_crtc->index, &dev_priv->mode_reg);
707 rgbs = (struct rgb *)dev_priv->mode_reg.crtc_reg[nv_crtc->index].DAC;
714 nouveau_hw_load_state_palette(dev, nv_crtc->index, &dev_priv->mode_reg);
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/nouveau/
H A Dnv04_dfp.c93 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
119 fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control;
134 fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control;
203 struct nv04_mode_state *state = &dev_priv->mode_reg;
248 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
289 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
456 dev_priv->mode_reg.crtc_reg[head].fp_control =
552 dev_priv->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK);
553 dev_priv->mode_reg.sel_clk &= ~0xf0;
555 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg
[all...]
H A Dnv04_cursor.c42 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
H A Dnv04_tv.c69 struct nv04_mode_state *state = &dev_priv->mode_reg;
98 struct nv04_crtc_reg *state = &dev_priv->mode_reg.crtc_reg[head];
140 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
H A Dnv04_crtc.c52 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
67 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
107 struct nv04_mode_state *state = &dev_priv->mode_reg;
234 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
439 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
596 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg.sel_clk);
606 struct nv04_mode_state *state = &dev_priv->mode_reg;
668 nouveau_hw_load_state(dev, nv_crtc->index, &dev_priv->mode_reg);
707 rgbs = (struct rgb *)dev_priv->mode_reg.crtc_reg[nv_crtc->index].DAC;
714 nouveau_hw_load_state_palette(dev, nv_crtc->index, &dev_priv->mode_reg);
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/mfd/
H A Dmenelaus.c448 u8 mode_reg; member in struct:menelaus_vtg
480 ret = menelaus_write_reg(vtg->mode_reg, mode);
597 .mode_reg = MENELAUS_LDO_CTRL3,
626 .mode_reg = MENELAUS_LDO_CTRL4,
666 .mode_reg = MENELAUS_DCDC_CTRL2,
674 .mode_reg = MENELAUS_DCDC_CTRL3,
711 .mode_reg = MENELAUS_LDO_CTRL7,
741 .mode_reg = MENELAUS_LDO_CTRL6,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/mfd/
H A Dmenelaus.c448 u8 mode_reg; member in struct:menelaus_vtg
480 ret = menelaus_write_reg(vtg->mode_reg, mode);
597 .mode_reg = MENELAUS_LDO_CTRL3,
626 .mode_reg = MENELAUS_LDO_CTRL4,
666 .mode_reg = MENELAUS_DCDC_CTRL2,
674 .mode_reg = MENELAUS_DCDC_CTRL3,
711 .mode_reg = MENELAUS_LDO_CTRL7,
741 .mode_reg = MENELAUS_LDO_CTRL6,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/
H A Ddnet.c183 u32 mode_reg, ctl_reg; local
189 mode_reg = dnet_readw_mac(bp, DNET_INTERNAL_MODE_REG);
209 mode_reg |= DNET_INTERNAL_MODE_GBITEN;
213 mode_reg &= ~DNET_INTERNAL_MODE_GBITEN;
228 mode_reg |=
231 mode_reg &=
244 dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, mode_reg);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/
H A Ddnet.c183 u32 mode_reg, ctl_reg; local
189 mode_reg = dnet_readw_mac(bp, DNET_INTERNAL_MODE_REG);
209 mode_reg |= DNET_INTERNAL_MODE_GBITEN;
213 mode_reg &= ~DNET_INTERNAL_MODE_GBITEN;
228 mode_reg |=
231 mode_reg &=
244 dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, mode_reg);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/mmc/host/
H A Datmel-mci.c98 * @mode_reg: Value of the MR register.
114 * @lock also protects mode_reg and need_clock_update since these are
162 u32 mode_reg; member in struct:atmel_mci
795 mci_writel(host, MR, host->mode_reg);
925 if (!host->mode_reg) {
953 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
961 host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
972 mci_writel(host, MR, host->mode_reg);
993 if (host->mode_reg) {
997 host->mode_reg
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/mmc/host/
H A Datmel-mci.c98 * @mode_reg: Value of the MR register.
114 * @lock also protects mode_reg and need_clock_update since these are
162 u32 mode_reg; member in struct:atmel_mci
795 mci_writel(host, MR, host->mode_reg);
925 if (!host->mode_reg) {
953 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
961 host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
972 mci_writel(host, MR, host->mode_reg);
993 if (host->mode_reg) {
997 host->mode_reg
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/powerpc/platforms/powermac/
H A Dlow_i2c.c394 u8 mode_reg = host->speed; local
402 mode_reg |= KW_I2C_MODE_STANDARD;
407 mode_reg |= KW_I2C_MODE_STANDARDSUB;
412 mode_reg |= KW_I2C_MODE_COMBINED;
420 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
429 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
430 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)

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