Searched refs:data_width (Results 1 - 25 of 31) sorted by relevance

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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/include/asm/
H A Dnand.h31 unsigned short data_width; member in struct:bf5xx_nand_platform
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/include/asm/
H A Dnand.h31 unsigned short data_width; member in struct:bf5xx_nand_platform
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/dma/
H A Dste_dma40_ll.c45 l3 |= cfg->dst_info.data_width << D40_MEM_LCSP3_DCFG_ESIZE_POS;
50 l1 |= cfg->src_info.data_width << D40_MEM_LCSP1_SCFG_ESIZE_POS;
107 src |= cfg->src_info.data_width << D40_SREG_CFG_ESIZE_POS;
108 dst |= cfg->dst_info.data_width << D40_SREG_CFG_ESIZE_POS;
135 u32 data_width,
146 * Size is 16bit. data_width is 8, 16, 32 or 64 bit
149 if (data_size > (0xffff << data_width))
153 if (!IS_ALIGNED(data, 0x1 << data_width))
157 if (data_size < num_elems * (0x1 << data_width))
161 lli->reg_elt = (data_size >> data_width) << D40_SREG_ELEM_PHY_ECNT_PO
128 d40_phy_fill_lli(struct d40_phy_lli *lli, dma_addr_t data, u32 data_size, int psize, dma_addr_t next_lli, u32 reg_cfg, bool term_int, u32 data_width, bool is_device) argument
193 d40_phy_sg_to_lli(struct scatterlist *sg, int sg_len, dma_addr_t target, struct d40_phy_lli *lli, dma_addr_t lli_phys, u32 reg_cfg, u32 data_width, int psize, bool term_int) argument
274 d40_log_fill_lli(struct d40_log_lli *lli, dma_addr_t data, u32 data_size, u32 lli_next_off, u32 reg_cfg, u32 data_width, bool term_int, bool addr_inc) argument
382 d40_log_sg_to_lli(int lcla_id, struct scatterlist *sg, int sg_len, struct d40_log_lli *lli_sg, u32 lcsp13, u32 data_width, bool term_int, int max_len, int llis_per_log) argument
[all...]
H A Dste_dma40_ll.h304 u32 data_width,
315 u32 data_width,
328 u32 data_width,
354 u32 data_width,
H A Dste_dma40.c1433 return num_elt * (1 << d40c->dma_cfg.dst_info.data_width);
1575 d40c->dma_cfg.src_info.data_width,
1585 d40c->dma_cfg.dst_info.data_width,
1604 d40c->dma_cfg.src_info.data_width,
1617 d40c->dma_cfg.dst_info.data_width,
1800 d40c->dma_cfg.src_info.data_width,
1808 d40c->dma_cfg.dst_info.data_width,
1826 d40c->dma_cfg.src_info.data_width,
1838 d40c->dma_cfg.dst_info.data_width,
1909 d40c->dma_cfg.src_info.data_width,
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/dma/
H A Dste_dma40_ll.c45 l3 |= cfg->dst_info.data_width << D40_MEM_LCSP3_DCFG_ESIZE_POS;
50 l1 |= cfg->src_info.data_width << D40_MEM_LCSP1_SCFG_ESIZE_POS;
107 src |= cfg->src_info.data_width << D40_SREG_CFG_ESIZE_POS;
108 dst |= cfg->dst_info.data_width << D40_SREG_CFG_ESIZE_POS;
135 u32 data_width,
146 * Size is 16bit. data_width is 8, 16, 32 or 64 bit
149 if (data_size > (0xffff << data_width))
153 if (!IS_ALIGNED(data, 0x1 << data_width))
157 if (data_size < num_elems * (0x1 << data_width))
161 lli->reg_elt = (data_size >> data_width) << D40_SREG_ELEM_PHY_ECNT_PO
128 d40_phy_fill_lli(struct d40_phy_lli *lli, dma_addr_t data, u32 data_size, int psize, dma_addr_t next_lli, u32 reg_cfg, bool term_int, u32 data_width, bool is_device) argument
193 d40_phy_sg_to_lli(struct scatterlist *sg, int sg_len, dma_addr_t target, struct d40_phy_lli *lli, dma_addr_t lli_phys, u32 reg_cfg, u32 data_width, int psize, bool term_int) argument
274 d40_log_fill_lli(struct d40_log_lli *lli, dma_addr_t data, u32 data_size, u32 lli_next_off, u32 reg_cfg, u32 data_width, bool term_int, bool addr_inc) argument
382 d40_log_sg_to_lli(int lcla_id, struct scatterlist *sg, int sg_len, struct d40_log_lli *lli_sg, u32 lcsp13, u32 data_width, bool term_int, int max_len, int llis_per_log) argument
[all...]
H A Dste_dma40_ll.h304 u32 data_width,
315 u32 data_width,
328 u32 data_width,
354 u32 data_width,
H A Dste_dma40.c1433 return num_elt * (1 << d40c->dma_cfg.dst_info.data_width);
1575 d40c->dma_cfg.src_info.data_width,
1585 d40c->dma_cfg.dst_info.data_width,
1604 d40c->dma_cfg.src_info.data_width,
1617 d40c->dma_cfg.dst_info.data_width,
1800 d40c->dma_cfg.src_info.data_width,
1808 d40c->dma_cfg.dst_info.data_width,
1826 d40c->dma_cfg.src_info.data_width,
1838 d40c->dma_cfg.dst_info.data_width,
1909 d40c->dma_cfg.src_info.data_width,
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-ux500/
H A Ddevices-db8500.c141 .src_info.data_width = STEDMA40_BYTE_WIDTH,
146 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
159 .src_info.data_width = STEDMA40_BYTE_WIDTH,
164 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-ux500/
H A Ddevices-db8500.c141 .src_info.data_width = STEDMA40_BYTE_WIDTH,
146 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
159 .src_info.data_width = STEDMA40_BYTE_WIDTH,
164 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/acpi/acpica/
H A Dexconvrt.c278 * data_width - Size of data item to be converted, in bytes
287 acpi_ex_convert_to_ascii(u64 integer, u16 base, u8 *string, u8 data_width) argument
305 switch (data_width) {
350 hex_length = ACPI_MUL_2(data_width);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/acpi/acpica/
H A Dexconvrt.c278 * data_width - Size of data item to be converted, in bytes
287 acpi_ex_convert_to_ascii(u64 integer, u16 base, u8 *string, u8 data_width) argument
305 switch (data_width) {
350 hex_length = ACPI_MUL_2(data_width);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-nomadik/include/plat/
H A Dste_dma40.h95 enum stedma40_periph_data_width data_width; member in struct:stedma40_half_channel_info
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-nomadik/include/plat/
H A Dste_dma40.h95 enum stedma40_periph_data_width data_width; member in struct:stedma40_half_channel_info
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/mtd/nand/
H A Dbf5xx_nand.c638 "data_width=%d, wr_dly=%d, rd_dly=%d\n",
639 (plat->data_width ? 16 : 8),
643 (plat->data_width << NFC_NWIDTH_OFFSET) |
776 if (plat->data_width)
781 chip->read_buf = (plat->data_width) ?
783 chip->write_buf = (plat->data_width) ?
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/mtd/nand/
H A Dbf5xx_nand.c638 "data_width=%d, wr_dly=%d, rd_dly=%d\n",
639 (plat->data_width ? 16 : 8),
643 (plat->data_width << NFC_NWIDTH_OFFSET) |
776 if (plat->data_width)
781 chip->read_buf = (plat->data_width) ?
783 chip->write_buf = (plat->data_width) ?
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/jpeg/
H A Dwrbmp.c50 JDIMENSION data_width; /* JSAMPLEs per row */ member in struct:__anon3994
419 dest->data_width = row_width;
422 dest->pad_bytes = (int) (row_width - dest->data_width);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/jpeg/
H A Dwrbmp.c50 JDIMENSION data_width; /* JSAMPLEs per row */ member in struct:__anon4899
419 dest->data_width = row_width;
422 dest->pad_bytes = (int) (row_width - dest->data_width);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/jpeg/
H A Dwrbmp.c50 JDIMENSION data_width; /* JSAMPLEs per row */ member in struct:__anon38924
419 dest->data_width = row_width;
422 dest->pad_bytes = (int) (row_width - dest->data_width);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/sound/sparc/
H A Ddbri.c1371 int data_width; local
1415 data_width = dbri->mm.channels * dbri->mm.precision;
1417 link_time_slot(dbri, 4, 16, 16, data_width, dbri->mm.offset);
1419 link_time_slot(dbri, 6, 16, 16, data_width, dbri->mm.offset);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/boards/
H A Dcm_bf527.c148 .data_width = NFC_NWIDTH_8,
H A Dezbrd.c152 .data_width = NFC_NWIDTH_8,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/sound/sparc/
H A Ddbri.c1371 int data_width; local
1415 data_width = dbri->mm.channels * dbri->mm.precision;
1417 link_time_slot(dbri, 4, 16, 16, data_width, dbri->mm.offset);
1419 link_time_slot(dbri, 6, 16, 16, data_width, dbri->mm.offset);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/boards/
H A Dcm_bf527.c148 .data_width = NFC_NWIDTH_8,
H A Dezbrd.c152 .data_width = NFC_NWIDTH_8,

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