Searched refs:chipcHw_REG_PLL_CONFIG_TEST_ENABLE (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-bcmring/include/mach/csp/
H A DchipcHw_inline.h1102 chipcHw_REG_PLL_CONFIG_TEST_ENABLE);
1112 chipcHw_REG_PLL_CONFIG_TEST_ENABLE);
1122 ~chipcHw_REG_PLL_CONFIG_TEST_ENABLE);
1132 ~chipcHw_REG_PLL_CONFIG_TEST_ENABLE);
1141 return pChipcHw->PLLConfig & chipcHw_REG_PLL_CONFIG_TEST_ENABLE;
1150 return pChipcHw->PLLConfig2 & chipcHw_REG_PLL_CONFIG_TEST_ENABLE;
H A DchipcHw_reg.h153 #define chipcHw_REG_PLL_CONFIG_TEST_ENABLE 0x00010000 /* PLL test output enable */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-bcmring/include/mach/csp/
H A DchipcHw_inline.h1102 chipcHw_REG_PLL_CONFIG_TEST_ENABLE);
1112 chipcHw_REG_PLL_CONFIG_TEST_ENABLE);
1122 ~chipcHw_REG_PLL_CONFIG_TEST_ENABLE);
1132 ~chipcHw_REG_PLL_CONFIG_TEST_ENABLE);
1141 return pChipcHw->PLLConfig & chipcHw_REG_PLL_CONFIG_TEST_ENABLE;
1150 return pChipcHw->PLLConfig2 & chipcHw_REG_PLL_CONFIG_TEST_ENABLE;
H A DchipcHw_reg.h153 #define chipcHw_REG_PLL_CONFIG_TEST_ENABLE 0x00010000 /* PLL test output enable */ macro

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