Searched refs:bXDTxAGC (Results 1 - 10 of 10) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192e/ |
| H A D | r819xE_phyreg.h | 303 #define bXDTxAGC 0xf0000 macro
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| H A D | r819xE_phy.c | 2294 (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue);
2435 (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192su/ |
| H A D | r8192S_phyreg.h | 442 #define bXDTxAGC 0xf0000 macro
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| H A D | r8192S_phy.c | 1798 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192u/ |
| H A D | r819xU_phyreg.h | 280 #define bXDTxAGC 0xf0000 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192e/ |
| H A D | r819xE_phyreg.h | 303 #define bXDTxAGC 0xf0000 macro
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| H A D | r819xE_phy.c | 2294 (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue);
2435 (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192su/ |
| H A D | r8192S_phyreg.h | 442 #define bXDTxAGC 0xf0000 macro
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| H A D | r8192S_phy.c | 1798 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192u/ |
| H A D | r819xU_phyreg.h | 280 #define bXDTxAGC 0xf0000 macro
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