Searched refs:bMaskDWord (Results 1 - 25 of 30) sorted by relevance

12

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192su/
H A Dr8192S_phy.c408 if(BitMask!= bMaskDWord)
419 if(BitMask!= bMaskDWord)
896 rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
903 rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);
1123 ulRegRead = rtl8192_phy_QueryRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord);
1257 rtl8192_QueryBBReg(dev, rTxAGC_Rate18_06, bMaskDWord);
1259 rtl8192_QueryBBReg(dev, rTxAGC_Rate54_24, bMaskDWord);
1261 rtl8192_QueryBBReg(dev, rTxAGC_Mcs03_Mcs00, bMaskDWord);
1263 rtl8192_QueryBBReg(dev, rTxAGC_Mcs07_Mcs04, bMaskDWord);
1265 rtl8192_QueryBBReg(dev, rTxAGC_Mcs11_Mcs08, bMaskDWord);
[all...]
H A Dr8192S_phy.h90 #define bMaskDWord 0xffffffff macro
H A Dr8192U_dm.c780 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
787 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
802 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
807 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
877 tmpRegA= rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
970 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);
1604 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1624 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1656 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1684 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVa
[all...]
H A Dr8192U_core.c633 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
719 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
747 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
774 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
801 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
828 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
855 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
882 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
H A Dr8192S_phyreg.h985 #define bMaskDWord 0xffffffff macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192su/
H A Dr8192S_phy.c408 if(BitMask!= bMaskDWord)
419 if(BitMask!= bMaskDWord)
896 rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
903 rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);
1123 ulRegRead = rtl8192_phy_QueryRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord);
1257 rtl8192_QueryBBReg(dev, rTxAGC_Rate18_06, bMaskDWord);
1259 rtl8192_QueryBBReg(dev, rTxAGC_Rate54_24, bMaskDWord);
1261 rtl8192_QueryBBReg(dev, rTxAGC_Mcs03_Mcs00, bMaskDWord);
1263 rtl8192_QueryBBReg(dev, rTxAGC_Mcs07_Mcs04, bMaskDWord);
1265 rtl8192_QueryBBReg(dev, rTxAGC_Mcs11_Mcs08, bMaskDWord);
[all...]
H A Dr8192S_phy.h90 #define bMaskDWord 0xffffffff macro
H A Dr8192U_dm.c780 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
787 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
802 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
807 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
877 tmpRegA= rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
970 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);
1604 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1624 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1656 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1684 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVa
[all...]
H A Dr8192U_core.c633 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
719 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
747 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
774 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
801 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
828 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
855 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
882 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
H A Dr8192S_phyreg.h985 #define bMaskDWord 0xffffffff macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192u/
H A Dr819xU_phy.h58 #define bMaskDWord 0xffffffff macro
H A Dr819xU_phy.c93 if(dwBitMask!= bMaskDWord)
152 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
161 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
195 bMaskDWord,
238 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
245 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
261 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
276 bMaskDWord,
556 rtl8192_setBBreg(dev, rtl819XPHY_REG_1T2RArray[i], bMaskDWord, rtl819XPHY_REG_1T2RArray[i+1]);
564 rtl8192_setBBreg(dev, rtl819XAGCTAB_Array[i], bMaskDWord, rtl819XAGCTAB_Arra
[all...]
H A Dr8192U_dm.c733 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
740 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
755 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
760 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
830 tmpRegA= rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
927 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);
1577 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1597 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1629 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1657 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVa
[all...]
H A Dr819xU_phyreg.h822 #define bMaskDWord 0xffffffff macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192u/
H A Dr819xU_phy.h58 #define bMaskDWord 0xffffffff macro
H A Dr819xU_phy.c93 if(dwBitMask!= bMaskDWord)
152 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
161 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
195 bMaskDWord,
238 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
245 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
261 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
276 bMaskDWord,
556 rtl8192_setBBreg(dev, rtl819XPHY_REG_1T2RArray[i], bMaskDWord, rtl819XPHY_REG_1T2RArray[i+1]);
564 rtl8192_setBBreg(dev, rtl819XAGCTAB_Array[i], bMaskDWord, rtl819XAGCTAB_Arra
[all...]
H A Dr8192U_dm.c733 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
740 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
755 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
760 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
830 tmpRegA= rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
927 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);
1577 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1597 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1629 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1657 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVa
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192e/
H A Dr819xE_phy.h103 #define bMaskDWord 0xffffffff macro
H A Dr8192E_dm.c789 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
796 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
801 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
802 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
813 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
817 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
828 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
831 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
835 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
836 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, pri
[all...]
H A Dr819xE_phy.c1472 if(dwBitMask!= bMaskDWord)
1536 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
1545 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
1579 bMaskDWord,
1649 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
1656 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
1672 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
1687 bMaskDWord,
2030 rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
2038 rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Tabl
[all...]
H A Dr819xE_phyreg.h863 #define bMaskDWord 0xffffffff macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192e/
H A Dr819xE_phy.h103 #define bMaskDWord 0xffffffff macro
H A Dr8192E_dm.c789 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
796 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
801 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
802 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
813 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
817 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
828 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
831 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
835 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
836 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, pri
[all...]
H A Dr819xE_phy.c1472 if(dwBitMask!= bMaskDWord)
1536 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
1545 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
1579 bMaskDWord,
1649 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
1656 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
1672 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
1687 bMaskDWord,
2030 rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
2038 rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Tabl
[all...]
H A Dr819xE_phyreg.h863 #define bMaskDWord 0xffffffff macro

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