Searched refs:UARTClock (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-bcmring/csp/chipc/
H A DchipcHw_reset.c53 pChipcHw->UARTClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT;
H A DchipcHw.c120 pPLLReg = &pChipcHw->UARTClock;
346 pPLLReg = &pChipcHw->UARTClock;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-bcmring/csp/chipc/
H A DchipcHw_reset.c53 pChipcHw->UARTClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT;
H A DchipcHw.c120 pPLLReg = &pChipcHw->UARTClock;
346 pPLLReg = &pChipcHw->UARTClock;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-bcmring/include/mach/csp/
H A DchipcHw_reg.h39 uint32_t UARTClock; /* PLL1 Channel 6 for UART clock */ member in struct:__anon11758
H A DchipcHw_inline.h864 pPLLReg = &pChipcHw->UARTClock;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-bcmring/include/mach/csp/
H A DchipcHw_reg.h39 uint32_t UARTClock; /* PLL1 Channel 6 for UART clock */ member in struct:__anon23451
H A DchipcHw_inline.h864 pPLLReg = &pChipcHw->UARTClock;

Completed in 135 milliseconds