Searched refs:TWL4030_ADJUSTABLE_LDO (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/regulator/
H A Dtwl-regulator.c484 #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) { \ macro
541 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
542 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
543 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
544 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
545 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
546 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
547 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
548 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
549 TWL4030_ADJUSTABLE_LDO(VPLL
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/regulator/
H A Dtwl-regulator.c484 #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) { \ macro
541 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
542 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
543 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
544 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
545 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
546 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
547 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
548 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
549 TWL4030_ADJUSTABLE_LDO(VPLL
[all...]

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