Searched refs:TIMER0LOAD (Results 1 - 2 of 2) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/msm/ |
| H A D | mddi_toshiba.c | 85 #define TIMER0LOAD (PWM_BLOCK_BASE|0x00) macro
666 write_client_reg(TIMER0LOAD, 0x00001388, TRUE);
673 write_client_reg(TIMER0LOAD, 0x00001388, TRUE);
1272 write_client_reg(TIMER0LOAD, 0x00001388, TRUE);
1417 write_client_reg(TIMER0LOAD, 0x00001388, TRUE);
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/msm/ |
| H A D | mddi_toshiba.c | 85 #define TIMER0LOAD (PWM_BLOCK_BASE|0x00) macro
666 write_client_reg(TIMER0LOAD, 0x00001388, TRUE);
673 write_client_reg(TIMER0LOAD, 0x00001388, TRUE);
1272 write_client_reg(TIMER0LOAD, 0x00001388, TRUE);
1417 write_client_reg(TIMER0LOAD, 0x00001388, TRUE);
|
Completed in 140 milliseconds