Searched refs:SPORT3_MTCS0 (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h384 #define bfin_read_SPORT3_MTCS0() bfin_read32(SPORT3_MTCS0)
385 #define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)
H A DdefBF539.h847 #define SPORT3_MTCS0 0xFFC02640 /* SPORT3 Multi-Channel Transmit Select Register 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h384 #define bfin_read_SPORT3_MTCS0() bfin_read32(SPORT3_MTCS0)
385 #define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)
H A DdefBF539.h847 #define SPORT3_MTCS0 0xFFC02640 /* SPORT3 Multi-Channel Transmit Select Register 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h1013 #define SPORT3_MTCS0 0xffc02640 /* SPORT3 Multi channel Transmit Select Register 0 */ macro
H A DcdefBF54x_base.h1744 #define bfin_read_SPORT3_MTCS0() bfin_read32(SPORT3_MTCS0)
1745 #define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h1013 #define SPORT3_MTCS0 0xffc02640 /* SPORT3 Multi channel Transmit Select Register 0 */ macro
H A DcdefBF54x_base.h1744 #define bfin_read_SPORT3_MTCS0() bfin_read32(SPORT3_MTCS0)
1745 #define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)

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