Searched refs:SPORT3_MRCS1 (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h394 #define bfin_read_SPORT3_MRCS1() bfin_read32(SPORT3_MRCS1)
395 #define bfin_write_SPORT3_MRCS1(val) bfin_write32(SPORT3_MRCS1, val)
H A DdefBF539.h852 #define SPORT3_MRCS1 0xFFC02654 /* SPORT3 Multi-Channel Receive Select Register 1 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h394 #define bfin_read_SPORT3_MRCS1() bfin_read32(SPORT3_MRCS1)
395 #define bfin_write_SPORT3_MRCS1(val) bfin_write32(SPORT3_MRCS1, val)
H A DdefBF539.h852 #define SPORT3_MRCS1 0xFFC02654 /* SPORT3 Multi-Channel Receive Select Register 1 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h1018 #define SPORT3_MRCS1 0xffc02654 /* SPORT3 Multi channel Receive Select Register 1 */ macro
H A DcdefBF54x_base.h1754 #define bfin_read_SPORT3_MRCS1() bfin_read32(SPORT3_MRCS1)
1755 #define bfin_write_SPORT3_MRCS1(val) bfin_write32(SPORT3_MRCS1, val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h1018 #define SPORT3_MRCS1 0xffc02654 /* SPORT3 Multi channel Receive Select Register 1 */ macro
H A DcdefBF54x_base.h1754 #define bfin_read_SPORT3_MRCS1() bfin_read32(SPORT3_MRCS1)
1755 #define bfin_write_SPORT3_MRCS1(val) bfin_write32(SPORT3_MRCS1, val)

Completed in 254 milliseconds