Searched refs:SPI1_RDBR (Results 1 - 10 of 10) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/
H A DdefBF51x_base.h92 #define SPI1_RDBR 0xFFC03410 /* SPI Receive Data Buffer Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DdefBF51x_base.h92 #define SPI1_RDBR 0xFFC03410 /* SPI Receive Data Buffer Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h174 #define bfin_read_SPI1_RDBR() bfin_read16(SPI1_RDBR)
175 #define bfin_write_SPI1_RDBR(val) bfin_write16(SPI1_RDBR, val)
H A DdefBF539.h792 #define SPI1_RDBR 0xFFC02310 /* SPI1 Receive Data Buffer Register */ macro
794 #define SPI1_SHADOW 0xFFC02318 /* SPI1_RDBR Shadow Register */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h174 #define bfin_read_SPI1_RDBR() bfin_read16(SPI1_RDBR)
175 #define bfin_write_SPI1_RDBR(val) bfin_write16(SPI1_RDBR, val)
H A DdefBF539.h792 #define SPI1_RDBR 0xFFC02310 /* SPI1 Receive Data Buffer Register */ macro
794 #define SPI1_SHADOW 0xFFC02318 /* SPI1_RDBR Shadow Register */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h968 #define SPI1_RDBR 0xffc02310 /* SPI1 Receive Data Buffer Register */ macro
H A DcdefBF54x_base.h1660 #define bfin_read_SPI1_RDBR() bfin_read16(SPI1_RDBR)
1661 #define bfin_write_SPI1_RDBR(val) bfin_write16(SPI1_RDBR, val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h968 #define SPI1_RDBR 0xffc02310 /* SPI1 Receive Data Buffer Register */ macro
H A DcdefBF54x_base.h1660 #define bfin_read_SPI1_RDBR() bfin_read16(SPI1_RDBR)
1661 #define bfin_write_SPI1_RDBR(val) bfin_write16(SPI1_RDBR, val)

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