/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/arch-v32/mm/ |
H A D | l2cache.c | 19 REG_WR(l2cache, regi_l2cache, rw_ctrl, ctrl); 25 REG_WR(l2cache, regi_l2cache, rw_cfg, cfg);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v32/mm/ |
H A D | l2cache.c | 19 REG_WR(l2cache, regi_l2cache, rw_ctrl, ctrl); 25 REG_WR(l2cache, regi_l2cache, rw_cfg, cfg);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/bnx2x/ |
H A D | bnx2x_init_ops.h | 27 REG_WR(bp, addr + i*4, data[i]); 217 REG_WR(bp, addr, op->write.val); 430 REG_WR(bp, read_arb_addr[i].l, read_arb_data[i][r_order].l); 431 REG_WR(bp, read_arb_addr[i].add, 433 REG_WR(bp, read_arb_addr[i].ubound, 441 REG_WR(bp, write_arb_addr[i].l, 444 REG_WR(bp, write_arb_addr[i].add, 447 REG_WR(bp, write_arb_addr[i].ubound, 452 REG_WR(bp, write_arb_addr[i].l, 456 REG_WR(b [all...] |
H A D | bnx2x_main.c | 175 REG_WR(bp, cmd_offset + i*4, *(((u32 *)dmae) + i)); 180 REG_WR(bp, dmae_reg_go_c[idx], 1); 663 REG_WR(bp, addr, val); 671 REG_WR(bp, addr, val); 688 REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, val); 689 REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, val); 713 REG_WR(bp, addr, val); 779 REG_WR(bp, hw_lock_control_reg + 4, resource_bit); 992 REG_WR(bp, hw_lock_control_reg + 4, resource_bit); 1035 REG_WR(b [all...] |
H A D | bnx2x_link.c | 189 REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_ST + params->port*0x10, 1); 190 REG_WR(bp, emac_base + EMAC_REG_EMAC_MDIO_COMM, 0x245f8000); 192 REG_WR(bp, emac_base + EMAC_REG_EMAC_MDIO_COMM, 0x245d000f); 195 REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_ST + params->port*0x10, 0); 202 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + 204 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + params->port*0x18, 209 REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_DEVAD + 220 REG_WR(bp, reg, val); 229 REG_WR(bp, reg, val); 243 REG_WR(b [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/bnx2x/ |
H A D | bnx2x_init_ops.h | 27 REG_WR(bp, addr + i*4, data[i]); 217 REG_WR(bp, addr, op->write.val); 430 REG_WR(bp, read_arb_addr[i].l, read_arb_data[i][r_order].l); 431 REG_WR(bp, read_arb_addr[i].add, 433 REG_WR(bp, read_arb_addr[i].ubound, 441 REG_WR(bp, write_arb_addr[i].l, 444 REG_WR(bp, write_arb_addr[i].add, 447 REG_WR(bp, write_arb_addr[i].ubound, 452 REG_WR(bp, write_arb_addr[i].l, 456 REG_WR(b [all...] |
H A D | bnx2x_main.c | 175 REG_WR(bp, cmd_offset + i*4, *(((u32 *)dmae) + i)); 180 REG_WR(bp, dmae_reg_go_c[idx], 1); 663 REG_WR(bp, addr, val); 671 REG_WR(bp, addr, val); 688 REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, val); 689 REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, val); 713 REG_WR(bp, addr, val); 779 REG_WR(bp, hw_lock_control_reg + 4, resource_bit); 992 REG_WR(bp, hw_lock_control_reg + 4, resource_bit); 1035 REG_WR(b [all...] |
H A D | bnx2x_link.c | 189 REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_ST + params->port*0x10, 1); 190 REG_WR(bp, emac_base + EMAC_REG_EMAC_MDIO_COMM, 0x245f8000); 192 REG_WR(bp, emac_base + EMAC_REG_EMAC_MDIO_COMM, 0x245d000f); 195 REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_ST + params->port*0x10, 0); 202 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + 204 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + params->port*0x18, 209 REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_DEVAD + 220 REG_WR(bp, reg, val); 229 REG_WR(bp, reg, val); 243 REG_WR(b [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/include/arch-v32/arch/hwregs/ |
H A D | dma.h | 78 REG_WR( dma, inst, rw_cfg, e); } while( 0 ) 84 REG_WR( dma, inst, rw_cfg, r); } while( 0 ) 90 REG_WR( dma, inst, rw_cfg, s); } while( 0 ) 96 REG_WR( dma, inst, rw_cfg, c); } while( 0 ) 103 REG_WR(dma, inst, rw_stream_cmd, __x); \ 125 REG_WR( dma, inst, rw_cmd, c ); } while( 0 )
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/include/arch-v32/arch/hwregs/ |
H A D | dma.h | 78 REG_WR( dma, inst, rw_cfg, e); } while( 0 ) 84 REG_WR( dma, inst, rw_cfg, r); } while( 0 ) 90 REG_WR( dma, inst, rw_cfg, s); } while( 0 ) 96 REG_WR( dma, inst, rw_cfg, c); } while( 0 ) 103 REG_WR(dma, inst, rw_stream_cmd, __x); \ 125 REG_WR( dma, inst, rw_cmd, c ); } while( 0 )
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/arch-v32/drivers/ |
H A D | iop_fw_load.c | 89 REG_WR(iop_spu, regi_iop_spu0, rw_ctrl, spu_ctrl); 93 REG_WR(iop_spu, regi_iop_spu1, rw_ctrl, spu_ctrl); 98 REG_WR(iop_sw_cpu, regi_iop_sw_cpu, rw_mc_ctrl, mc_ctrl); 150 REG_WR(iop_mpu, regi_iop_mpu, rw_ctrl, mpu_ctrl); 156 REG_WR(iop_mpu, regi_iop_mpu, rw_instr, MPU_SWX_IIR_INSTR(0, 4, 0)); 177 REG_WR(iop_mpu, regi_iop_mpu, rw_instr, MPU_HALT()); 187 REG_WR(iop_mpu, regi_iop_mpu, rw_instr, MPU_DI()); 191 REG_WR(iop_mpu, regi_iop_mpu, rw_ctrl, mpu_ctrl);
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H A D | sync_serial.c | 335 REG_WR(sser, port->regi_sser, rw_cfg, cfg); 345 REG_WR(sser, port->regi_sser, rw_frm_cfg, frm_cfg); 354 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg); 360 REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg); 535 REG_WR(dma, port->regi_dmain, rw_cfg, cfg); 536 REG_WR(dma, port->regi_dmaout, rw_cfg, cfg); 538 REG_WR(dma, port->regi_dmain, rw_intr_mask, intr_mask); 539 REG_WR(dma, port->regi_dmaout, rw_intr_mask, intr_mask); 618 REG_WR(sser, port->regi_sser, rw_cfg, cfg); 619 REG_WR(sse [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v32/drivers/ |
H A D | iop_fw_load.c | 89 REG_WR(iop_spu, regi_iop_spu0, rw_ctrl, spu_ctrl); 93 REG_WR(iop_spu, regi_iop_spu1, rw_ctrl, spu_ctrl); 98 REG_WR(iop_sw_cpu, regi_iop_sw_cpu, rw_mc_ctrl, mc_ctrl); 150 REG_WR(iop_mpu, regi_iop_mpu, rw_ctrl, mpu_ctrl); 156 REG_WR(iop_mpu, regi_iop_mpu, rw_instr, MPU_SWX_IIR_INSTR(0, 4, 0)); 177 REG_WR(iop_mpu, regi_iop_mpu, rw_instr, MPU_HALT()); 187 REG_WR(iop_mpu, regi_iop_mpu, rw_instr, MPU_DI()); 191 REG_WR(iop_mpu, regi_iop_mpu, rw_ctrl, mpu_ctrl);
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H A D | sync_serial.c | 335 REG_WR(sser, port->regi_sser, rw_cfg, cfg); 345 REG_WR(sser, port->regi_sser, rw_frm_cfg, frm_cfg); 354 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg); 360 REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg); 535 REG_WR(dma, port->regi_dmain, rw_cfg, cfg); 536 REG_WR(dma, port->regi_dmaout, rw_cfg, cfg); 538 REG_WR(dma, port->regi_dmain, rw_intr_mask, intr_mask); 539 REG_WR(dma, port->regi_dmaout, rw_intr_mask, intr_mask); 618 REG_WR(sser, port->regi_sser, rw_cfg, cfg); 619 REG_WR(sse [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/bcm57xx/sys/ |
H A D | tigon3.c | 362 REG_WR( pDevice, Nvram.SwArb, SW_ARB_REQ_SET1 ); 397 REG_WR( pDevice, Nvram.SwArb, SW_ARB_REQ_CLR1 ); 419 REG_WR( pDevice, Grc.EepromAddr, cmd ); 456 REG_WR( pDevice, Nvram.Cmd, cmd ); 553 REG_WR( pDevice, Nvram.Addr, physaddr ); 658 REG_WR( pDevice, Nvram.Config3, value32 ); 660 REG_WR( pDevice, Nvram.Addr, 0x0 ); 665 REG_WR( pDevice, Nvram.Config3, config3 ); 707 REG_WR( pDevice, Nvram.Config1, value32 ); 710 REG_WR( pDevic [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/arch-v32/kernel/ |
H A D | debugport.c | 156 REG_WR (ser, p->instance, rw_tr_baud_div, tr_baud_div); 157 REG_WR (ser, p->instance, rw_rec_baud_div, rec_baud_div); 158 REG_WR (ser, p->instance, rw_tr_dma_en, tr_dma_en); 159 REG_WR (ser, p->instance, rw_tr_ctrl, tr_ctrl); 160 REG_WR (ser, p->instance, rw_rec_ctrl, rec_ctrl); 177 REG_WR(ser, kgdb_port->instance, rw_ack_intr, ack_intr);
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H A D | time.c | 129 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl); 144 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl); 167 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, ctrl); 204 REG_WR(timer, timer_regs[cpu], rw_ack_intr, ack_intr); 249 REG_WR(timer, timer_regs[cpu], rw_tmr0_div, tmr0_div); 250 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Load */ 252 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Start */ 257 REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask); 326 REG_WR(timer, timer_regs[freqs->cpu], rw_tmr0_div, div);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v32/kernel/ |
H A D | debugport.c | 156 REG_WR (ser, p->instance, rw_tr_baud_div, tr_baud_div); 157 REG_WR (ser, p->instance, rw_rec_baud_div, rec_baud_div); 158 REG_WR (ser, p->instance, rw_tr_dma_en, tr_dma_en); 159 REG_WR (ser, p->instance, rw_tr_ctrl, tr_ctrl); 160 REG_WR (ser, p->instance, rw_rec_ctrl, rec_ctrl); 177 REG_WR(ser, kgdb_port->instance, rw_ack_intr, ack_intr);
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H A D | time.c | 129 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl); 144 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl); 167 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, ctrl); 204 REG_WR(timer, timer_regs[cpu], rw_ack_intr, ack_intr); 249 REG_WR(timer, timer_regs[cpu], rw_tmr0_div, tmr0_div); 250 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Load */ 252 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Start */ 257 REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask); 326 REG_WR(timer, timer_regs[freqs->cpu], rw_tmr0_div, div);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/boot/compressed/ |
H A D | misc.c | 138 REG_WR(ser, regi_ser, rw_dout, dout); 248 REG_WR(ser, regi_ser, rw_xoff, xoff); 270 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl); 271 REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud); 272 REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl); 273 REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud); 296 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); 321 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/boot/compressed/ |
H A D | misc.c | 138 REG_WR(ser, regi_ser, rw_dout, dout); 248 REG_WR(ser, regi_ser, rw_xoff, xoff); 270 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl); 271 REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud); 272 REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl); 273 REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud); 296 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); 321 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/arch-v32/drivers/mach-a3/ |
H A D | nandflash.c | 83 REG_WR(pio, regi_pio, rw_dout, dout); 133 REG_WR(pio, regi_pio, rw_man_ctrl, man_ctrl); 134 REG_WR(pio, regi_pio, rw_dout, dout); 135 REG_WR(pio, regi_pio, rw_oe, oe);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v32/drivers/mach-a3/ |
H A D | nandflash.c | 83 REG_WR(pio, regi_pio, rw_dout, dout); 133 REG_WR(pio, regi_pio, rw_man_ctrl, man_ctrl); 134 REG_WR(pio, regi_pio, rw_dout, dout); 135 REG_WR(pio, regi_pio, rw_oe, oe);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/arch-v32/drivers/mach-fs/ |
H A D | nandflash.c | 77 REG_WR(gio, regi_gio, rw_pa_dout, dout); 137 REG_WR(gio, regi_gio, rw_pa_oe, pa_oe); 141 REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v32/drivers/mach-fs/ |
H A D | nandflash.c | 77 REG_WR(gio, regi_gio, rw_pa_dout, dout); 137 REG_WR(gio, regi_gio, rw_pa_oe, pa_oe); 141 REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg);
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