Searched refs:PSPR (Results 1 - 24 of 24) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/
H A Dmioa701_bootresume.S23 .word 0x40f00008 @ PSPR in no-MMU mode
H A Dpxa25x.c254 PSPR = virt_to_phys(pxa_cpu_resume);
261 PSPR = 0;
H A Dpalmz72.c186 * to be transferred via PSPR. Using this struct PalmOS restores
220 /* Setting PSPR to a proper value */
221 PSPR = virt_to_phys(&palmz72_resume_info);
H A Dpxa27x.c306 PSPR = virt_to_phys(pxa_cpu_resume);
313 PSPR = 0;
H A Dpxa3xx.c346 * with the address stored within the first 4 bytes of SDRAM. The PSPR
371 PSPR = 0x5c014000;
H A Dzeus.c889 /* Clear PSPR to ensure a full restart on wake-up. */
890 PMCR = PSPR = 0;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/
H A Dpm.c76 PSPR = virt_to_phys(sa1100_cpu_resume);
86 PSPR = 0;
H A Dsimpad.c187 PSPR = 0;
H A Dgeneric.c148 PSPR = 0;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/
H A Dmioa701_bootresume.S23 .word 0x40f00008 @ PSPR in no-MMU mode
H A Dpxa25x.c254 PSPR = virt_to_phys(pxa_cpu_resume);
261 PSPR = 0;
H A Dpalmz72.c186 * to be transferred via PSPR. Using this struct PalmOS restores
220 /* Setting PSPR to a proper value */
221 PSPR = virt_to_phys(&palmz72_resume_info);
H A Dpxa27x.c306 PSPR = virt_to_phys(pxa_cpu_resume);
313 PSPR = 0;
H A Dpxa3xx.c346 * with the address stored within the first 4 bytes of SDRAM. The PSPR
371 PSPR = 0x5c014000;
H A Dzeus.c889 /* Clear PSPR to ensure a full restart on wake-up. */
890 PMCR = PSPR = 0;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/
H A Dpm.c76 PSPR = virt_to_phys(sa1100_cpu_resume);
86 PSPR = 0;
H A Dsimpad.c187 PSPR = 0;
H A Dgeneric.c148 PSPR = 0;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/include/mach/
H A Dpxa3xx-regs.h40 #define PSPR __REG(0x40F50008) /* Power Manager Scratch Pad Register */ macro
H A Dpxa2xx-regs.h91 #define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/include/mach/
H A Dpxa3xx-regs.h40 #define PSPR __REG(0x40F50008) /* Power Manager Scratch Pad Register */ macro
H A Dpxa2xx-regs.h91 #define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h885 * PSPR Power Manager (PM) Scratch-Pad Register (read/write).
904 #define PSPR __REG(0x90020008) /* PM Scratch-Pad Reg. */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h885 * PSPR Power Manager (PM) Scratch-Pad Register (read/write).
904 #define PSPR __REG(0x90020008) /* PM Scratch-Pad Reg. */ macro

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