Searched refs:PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1 (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-cns3xxx/
H A Ddevices.c64 cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-cns3xxx/
H A Ddevices.c64 cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-cns3xxx/include/mach/
H A Dcns3xxx.h491 #define PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1 (11) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-cns3xxx/include/mach/
H A Dcns3xxx.h491 #define PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1 (11) macro

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