Searched refs:PHY_CTRL (Results 1 - 19 of 19) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/e1000/
H A De1000_ethtool.c1213 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1225 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1227 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1233 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1261 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1263 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1269 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
1339 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1341 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1392 e1000_read_phy_reg(hw, PHY_CTRL,
[all...]
H A De1000_main.c436 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
438 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
471 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
473 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4172 !e1000_read_phy_reg(hw, PHY_CTRL,
4176 e1000_write_phy_reg(hw, PHY_CTRL,
4187 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
4190 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
4264 case PHY_CTRL:
4298 case PHY_CTRL
[all...]
H A De1000_hw.c1297 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
1302 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
1617 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &mii_ctrl_reg);
1704 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, mii_ctrl_reg);
2974 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
2979 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
H A De1000_hw.h2451 #define PHY_CTRL 0x00 /* Control Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/e1000/
H A De1000_ethtool.c1213 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1225 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1227 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1233 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1261 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1263 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1269 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
1339 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1341 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1392 e1000_read_phy_reg(hw, PHY_CTRL,
[all...]
H A De1000_main.c436 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
438 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
471 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
473 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4172 !e1000_read_phy_reg(hw, PHY_CTRL,
4176 e1000_write_phy_reg(hw, PHY_CTRL,
4187 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
4190 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
4264 case PHY_CTRL:
4298 case PHY_CTRL
[all...]
H A De1000_hw.c1297 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
1302 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
1617 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &mii_ctrl_reg);
1704 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, mii_ctrl_reg);
2974 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
2979 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
H A De1000_hw.h2451 #define PHY_CTRL 0x00 /* Control Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/e1000e/
H A Dich8lan.c1220 mac_reg = er32(PHY_CTRL);
1791 phy_ctrl = er32(PHY_CTRL);
1795 ew32(PHY_CTRL, phy_ctrl);
1811 ew32(PHY_CTRL, phy_ctrl);
1870 phy_ctrl = er32(PHY_CTRL);
1874 ew32(PHY_CTRL, phy_ctrl);
1912 ew32(PHY_CTRL, phy_ctrl);
3368 phy_ctrl = er32(PHY_CTRL);
3371 ew32(PHY_CTRL, phy_ctrl);
3403 reg = er32(PHY_CTRL);
[all...]
H A Dphy.c2623 (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE)))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/e1000e/
H A Dich8lan.c1220 mac_reg = er32(PHY_CTRL);
1791 phy_ctrl = er32(PHY_CTRL);
1795 ew32(PHY_CTRL, phy_ctrl);
1811 ew32(PHY_CTRL, phy_ctrl);
1870 phy_ctrl = er32(PHY_CTRL);
1874 ew32(PHY_CTRL, phy_ctrl);
1912 ew32(PHY_CTRL, phy_ctrl);
3368 phy_ctrl = er32(PHY_CTRL);
3371 ew32(PHY_CTRL, phy_ctrl);
3403 reg = er32(PHY_CTRL);
[all...]
H A Dphy.c2623 (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE)))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/
H A Dipg.c175 ipg_w8(IPG_PC_RSVD_MASK & data, PHY_CTRL);
195 phyctrlpolarity) & IPG_PC_RSVD_MASK, PHY_CTRL);
204 bit_data = ((ipg_r8(PHY_CTRL) & IPG_PC_MGMTDATA) >> 1) & 1;
249 polarity = ipg_r8(PHY_CTRL);
340 polarity = ipg_r8(PHY_CTRL);
376 p[j].field |= ((ipg_r8(PHY_CTRL) &
488 phyctrl = ipg_r8(PHY_CTRL);
H A Dipg.h81 PHY_CTRL = 0x76, enumerator in enum:ipg_regs
H A Dsh_eth.h538 PHY_CTRL = 0, PHY_STAT = 1, PHY_IDT1 = 2, PHY_IDT2 = 3, enumerator in enum:phy_offsets
543 /* PHY_CTRL */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/
H A Dipg.c175 ipg_w8(IPG_PC_RSVD_MASK & data, PHY_CTRL);
195 phyctrlpolarity) & IPG_PC_RSVD_MASK, PHY_CTRL);
204 bit_data = ((ipg_r8(PHY_CTRL) & IPG_PC_MGMTDATA) >> 1) & 1;
249 polarity = ipg_r8(PHY_CTRL);
340 polarity = ipg_r8(PHY_CTRL);
376 p[j].field |= ((ipg_r8(PHY_CTRL) &
488 phyctrl = ipg_r8(PHY_CTRL);
H A Dipg.h81 PHY_CTRL = 0x76, enumerator in enum:ipg_regs
H A Dsh_eth.h538 PHY_CTRL = 0, PHY_STAT = 1, PHY_IDT1 = 2, PHY_IDT2 = 3, enumerator in enum:phy_offsets
543 /* PHY_CTRL */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/include/
H A Dd11.h2943 #define PHY_CTRL 0x49 macro
2975 /* IHR PHY_CTRL STAT values */

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