Searched refs:OSC_CTRL (Results 1 - 6 of 6) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-tegra/ |
H A D | tegra2_clocks.c | 42 #define OSC_CTRL 0x50 macro 174 u32 auto_clock_control = clk_readl(OSC_CTRL) & ~OSC_CTRL_OSC_FREQ_MASK; 194 clk_writel(auto_clock_control, OSC_CTRL);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-tegra/ |
H A D | tegra2_clocks.c | 42 #define OSC_CTRL 0x50 macro 174 u32 auto_clock_control = clk_readl(OSC_CTRL) & ~OSC_CTRL_OSC_FREQ_MASK; 194 clk_writel(auto_clock_control, OSC_CTRL);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rt2860/chip/ |
H A D | rtmp_mac.h | 373 #define OSC_CTRL 0x5a4 macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rt2860/ |
H A D | pci_main_dev.c | 617 /* 1. if use PCIePowerSetting is 2 or 3, need to program OSC_CTRL to 0x3ff11. */ 619 RTMP_IO_WRITE32(pAd, OSC_CTRL, MacValue); 621 (" OSC_CTRL = 0x%x\n", MacValue));
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rt2860/chip/ |
H A D | rtmp_mac.h | 373 #define OSC_CTRL 0x5a4 macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rt2860/ |
H A D | pci_main_dev.c | 617 /* 1. if use PCIePowerSetting is 2 or 3, need to program OSC_CTRL to 0x3ff11. */ 619 RTMP_IO_WRITE32(pAd, OSC_CTRL, MacValue); 621 (" OSC_CTRL = 0x%x\n", MacValue));
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