Searched refs:NV_PEXTDEV_BOOT_0 (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/gpu/drm/nouveau/
H A Dnouveau_calc.c222 sim_data.memory_width = (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & 0x10) ? 128 : 64;
H A Dnv04_dfp.c339 if (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT)
H A Dnouveau_bios.c2290 int i = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) &
2676 uint32_t straps = bios_rd32(bios, NV_PEXTDEV_BOOT_0);
3147 uint32_t strap = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) & 0x0000003c) >> 2;
3309 strap_ramcfg = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 2) & 0xf;
4075 return (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
4077 return (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
4711 crystal_straps = nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) &
H A Dnouveau_reg.h58 #define NV_PEXTDEV_BOOT_0 0x00101000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/nouveau/
H A Dnouveau_calc.c222 sim_data.memory_width = (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & 0x10) ? 128 : 64;
H A Dnv04_dfp.c339 if (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT)
H A Dnouveau_bios.c2290 int i = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) &
2676 uint32_t straps = bios_rd32(bios, NV_PEXTDEV_BOOT_0);
3147 uint32_t strap = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) & 0x0000003c) >> 2;
3309 strap_ramcfg = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 2) & 0xf;
4075 return (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
4077 return (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
4711 crystal_straps = nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) &
H A Dnouveau_reg.h58 #define NV_PEXTDEV_BOOT_0 0x00101000 macro

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