| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/block/ |
| H A D | smart1,2.h | 128 writel(val, h->vaddr + INTR_MASK);
164 outl(val, h->io_mem_addr + INTR_MASK);
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| H A D | ida_cmd.h | 38 #define INTR_MASK 0x0C macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/block/ |
| H A D | smart1,2.h | 128 writel(val, h->vaddr + INTR_MASK);
164 outl(val, h->io_mem_addr + INTR_MASK);
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| H A D | ida_cmd.h | 38 #define INTR_MASK 0x0C macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/cxgb3/ |
| H A D | vsc8211.c | 71 #define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \ macro
100 INTR_MASK);
331 cause &= INTR_MASK;
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/cxgb3/ |
| H A D | vsc8211.c | 71 #define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \ macro
100 INTR_MASK);
331 cause &= INTR_MASK;
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/qlge/ |
| H A D | qlge_mpi.c | 227 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
294 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
539 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
605 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
1247 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
1261 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
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| H A D | qlge_main.c | 2433 (ql_read32(qdev, INTR_MASK) & INTR_MASK_PI)) {
2441 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
3693 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
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| H A D | qlge.h | 269 * Interrupt Mask Register (INTR_MASK) bit definitions.
810 INTR_MASK = 0x38, enumerator in enum:__anon16983
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/qlge/ |
| H A D | qlge_mpi.c | 227 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
294 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
539 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
605 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
1247 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
1261 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
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| H A D | qlge_main.c | 2433 (ql_read32(qdev, INTR_MASK) & INTR_MASK_PI)) {
2441 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
3693 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/usb/host/ |
| H A D | ehci-au1xxx.c | 259 int mask = INTR_MASK;
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| H A D | ehci-mips.c | 222 int mask = INTR_MASK;
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| H A D | ehci-pci.c | 383 int mask = INTR_MASK;
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| H A D | oxu210hp.h | 119 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
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| H A D | ehci-hcd.c | 115 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
737 ehci_writel(ehci, INTR_MASK,
768 masked_status = status & INTR_MASK;
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| H A D | ehci-hub.c | 300 mask = INTR_MASK;
436 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
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| H A D | oxu210hp-hcd.c | 2430 status &= INTR_MASK;
2733 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
3475 mask = INTR_MASK;
3562 writel(INTR_MASK, &oxu->regs->intr_enable);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/usb/host/ |
| H A D | ehci-au1xxx.c | 259 int mask = INTR_MASK;
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| H A D | ehci-mips.c | 222 int mask = INTR_MASK;
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| H A D | ehci-pci.c | 383 int mask = INTR_MASK;
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| H A D | oxu210hp.h | 119 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
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| H A D | ehci-hcd.c | 115 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
737 ehci_writel(ehci, INTR_MASK,
768 masked_status = status & INTR_MASK;
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| H A D | ehci-hub.c | 300 mask = INTR_MASK;
436 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
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| H A D | oxu210hp-hcd.c | 2430 status &= INTR_MASK;
2733 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
3475 mask = INTR_MASK;
3562 writel(INTR_MASK, &oxu->regs->intr_enable);
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