| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/ppc/ |
| H A D | idecode_expression.h | 258 CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \
314 /* some FPSCR update macros. */
318 fpscreg old_fpscr UNUSED = FPSCR
322 if ((FPSCR & fpscr_vx_bits)) \
323 FPSCR |= fpscr_vx; \
325 FPSCR &= ~fpscr_vx; \
327 if (((FPSCR & fpscr_vx) && (FPSCR & fpscr_ve)) \
328 || ((FPSCR & fpscr_ox) && (FPSCR
[all...] |
| H A D | registers.h | 346 #define FPSCR cpu_registers(processor)->fpscr macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/ppc/ |
| H A D | idecode_expression.h | 258 CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \
314 /* some FPSCR update macros. */
318 fpscreg old_fpscr UNUSED = FPSCR
322 if ((FPSCR & fpscr_vx_bits)) \
323 FPSCR |= fpscr_vx; \
325 FPSCR &= ~fpscr_vx; \
327 if (((FPSCR & fpscr_vx) && (FPSCR & fpscr_ve)) \
328 || ((FPSCR & fpscr_ox) && (FPSCR
[all...] |
| H A D | registers.h | 346 #define FPSCR cpu_registers(processor)->fpscr macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/ppc/ |
| H A D | idecode_expression.h | 258 CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \
314 /* some FPSCR update macros. */
318 fpscreg old_fpscr UNUSED = FPSCR
322 if ((FPSCR & fpscr_vx_bits)) \
323 FPSCR |= fpscr_vx; \
325 FPSCR &= ~fpscr_vx; \
327 if (((FPSCR & fpscr_vx) && (FPSCR & fpscr_ve)) \
328 || ((FPSCR & fpscr_ox) && (FPSCR
[all...] |
| H A D | registers.h | 346 #define FPSCR cpu_registers(processor)->fpscr macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/testsuite/sim/sh64/compact/ |
| H A D | testutils.inc | 17 # Set the PR (PRecision) bit in the FPSCR.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/testsuite/sim/sh64/compact/ |
| H A D | testutils.inc | 17 # Set the PR (PRecision) bit in the FPSCR.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/testsuite/sim/sh64/compact/ |
| H A D | testutils.inc | 17 # Set the PR (PRecision) bit in the FPSCR.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/include/asm/ |
| H A D | vfp.h | 9 #define FPSCR cr1 macro
49 /* FPSCR bits */
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/include/asm/ |
| H A D | vfp.h | 9 #define FPSCR cr1 macro
49 /* FPSCR bits */
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/math-emu/ |
| H A D | math.c | 27 #define FPSCR (fregs->fpscr) macro
28 #define FPSCR_RM (FPSCR&3)
29 #define FPSCR_DN ((FPSCR>>18)&1)
30 #define FPSCR_PR ((FPSCR>>19)&1)
31 #define FPSCR_SZ ((FPSCR>>20)&1)
32 #define FPSCR_FR ((FPSCR>>21)&1)
341 FPSCR ^= flag;
434 unsigned long *reg = (code & 0x0010) ? &FPUL : &FPSCR;
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/math-emu/ |
| H A D | math.c | 27 #define FPSCR (fregs->fpscr) macro
28 #define FPSCR_RM (FPSCR&3)
29 #define FPSCR_DN ((FPSCR>>18)&1)
30 #define FPSCR_PR ((FPSCR>>19)&1)
31 #define FPSCR_SZ ((FPSCR>>20)&1)
32 #define FPSCR_FR ((FPSCR>>21)&1)
341 FPSCR ^= flag;
434 unsigned long *reg = (code & 0x0010) ? &FPUL : &FPSCR;
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/vfp/ |
| H A D | vfphw.S | 102 VFPFMRX r5, FPSCR @ current status
112 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
123 ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
133 VFPFMXR FPSCR, r5 @ restore status
157 @ On some implementations of the VFP subarch 1, setting FPSCR.IXE
160 VFPFMRX r5, FPSCR
197 VFPFMRX r2, FPSCR @ current status
205 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
|
| H A D | vfpmodule.c | 179 fmrx(FPEXC), fmrx(FPSCR), inst);
201 * If any of the status flags are set, update the FPSCR.
210 fmxr(FPSCR, fpscr);
290 orig_fpscr = fpscr = fmrx(FPSCR);
293 * Check for the special VFP subarch 1 and FPSCR.IXE bit case
315 * unallocated VFP instruction but with FPSCR.IXE set and not
325 * whether FPEXC.VECITR or FPSCR.LEN is used.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/vfp/ |
| H A D | vfphw.S | 102 VFPFMRX r5, FPSCR @ current status
112 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
123 ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
133 VFPFMXR FPSCR, r5 @ restore status
157 @ On some implementations of the VFP subarch 1, setting FPSCR.IXE
160 VFPFMRX r5, FPSCR
197 VFPFMRX r2, FPSCR @ current status
205 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
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| H A D | vfpmodule.c | 179 fmrx(FPEXC), fmrx(FPSCR), inst);
201 * If any of the status flags are set, update the FPSCR.
210 fmxr(FPSCR, fpscr);
290 orig_fpscr = fpscr = fmrx(FPSCR);
293 * Check for the special VFP subarch 1 and FPSCR.IXE bit case
315 * unallocated VFP instruction but with FPSCR.IXE set and not
325 * whether FPEXC.VECITR or FPSCR.LEN is used.
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/gdb/ |
| H A D | rs6000-nat.c | 172 return FPSCR;
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/gdb/ |
| H A D | rs6000-nat.c | 172 return FPSCR;
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/gdb/ |
| H A D | rs6000-nat.c | 172 return FPSCR;
|