Searched refs:EBIU_MBSCTL (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-common/
H A Ddpmc_modes.S378 PM_SYS_PUSH(EBIU_MBSCTL)
728 PM_SYS_POP(EBIU_MBSCTL)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-common/
H A Ddpmc_modes.S378 PM_SYS_PUSH(EBIU_MBSCTL)
728 PM_SYS_POP(EBIU_MBSCTL)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h155 #define EBIU_MBSCTL 0xffc00a0c /* Asynchronous Memory Bank Select Control Register */ macro
1679 /* Bit masks for EBIU_MBSCTL */
H A DcdefBF54x_base.h221 #define bfin_read_EBIU_MBSCTL() bfin_read16(EBIU_MBSCTL)
222 #define bfin_write_EBIU_MBSCTL(val) bfin_write16(EBIU_MBSCTL, val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h155 #define EBIU_MBSCTL 0xffc00a0c /* Asynchronous Memory Bank Select Control Register */ macro
1679 /* Bit masks for EBIU_MBSCTL */
H A DcdefBF54x_base.h221 #define bfin_read_EBIU_MBSCTL() bfin_read16(EBIU_MBSCTL)
222 #define bfin_write_EBIU_MBSCTL(val) bfin_write16(EBIU_MBSCTL, val)

Completed in 168 milliseconds