Searched refs:E1000_CTRL_PHY_RST (Results 1 - 14 of 14) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/igb/ |
| H A D | e1000_defines.h | 193 #define E1000_CTRL_PHY_RST 0x80000000 /* PHY Reset */ macro
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| H A D | e1000_phy.c | 1830 wr32(E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/igb/ |
| H A D | e1000_defines.h | 193 #define E1000_CTRL_PHY_RST 0x80000000 /* PHY Reset */ macro
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| H A D | e1000_phy.c | 1830 wr32(E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/e1000e/ |
| H A D | defines.h | 231 #define E1000_CTRL_PHY_RST 0x80000000 /* PHY Reset */ macro
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| H A D | ich8lan.c | 2974 ctrl |= E1000_CTRL_PHY_RST;
2992 if (ctrl & E1000_CTRL_PHY_RST) {
3424 ew32(CTRL, reg | E1000_CTRL_PHY_RST);
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| H A D | phy.c | 2136 ew32(CTRL, ctrl | E1000_CTRL_PHY_RST);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/e1000e/ |
| H A D | defines.h | 231 #define E1000_CTRL_PHY_RST 0x80000000 /* PHY Reset */ macro
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| H A D | ich8lan.c | 2974 ctrl |= E1000_CTRL_PHY_RST;
2992 if (ctrl & E1000_CTRL_PHY_RST) {
3424 ew32(CTRL, reg | E1000_CTRL_PHY_RST);
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| H A D | phy.c | 2136 ew32(CTRL, ctrl | E1000_CTRL_PHY_RST);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/e1000/ |
| H A D | e1000_hw.c | 436 ew32(CTRL, (ctrl | E1000_CTRL_PHY_RST));
2907 /* Read the device control register and assert the E1000_CTRL_PHY_RST
2913 ew32(CTRL, ctrl | E1000_CTRL_PHY_RST);
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| H A D | e1000_hw.h | 1430 #define E1000_CTRL_PHY_RST 0x80000000 /* PHY Reset */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/e1000/ |
| H A D | e1000_hw.c | 436 ew32(CTRL, (ctrl | E1000_CTRL_PHY_RST));
2907 /* Read the device control register and assert the E1000_CTRL_PHY_RST
2913 ew32(CTRL, ctrl | E1000_CTRL_PHY_RST);
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| H A D | e1000_hw.h | 1430 #define E1000_CTRL_PHY_RST 0x80000000 /* PHY Reset */ macro
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