Searched refs:DDR40_CORE_PHY_CONTROL_REGS_VIRTUAL_VTT_CONNECTIONS (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/arm/board/bcm947xx/src/
H A Dddr40_phy_init.c343 DDR40_PHY_RegWr(DDR40_CORE_PHY_CONTROL_REGS_VIRTUAL_VTT_CONNECTIONS + offset, connect);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/arm/board/bcm947xx/include/
H A Dddr40_phy_registers.h99 #define DDR40_CORE_PHY_CONTROL_REGS_VIRTUAL_VTT_CONNECTIONS 0x00000064 /* Virtual VTT Connections register */ macro

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