Searched refs:DC_HPD5_INT_CONTROL (Results 1 - 8 of 8) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/gpu/drm/radeon/ |
| H A D | evergreen.c | 187 tmp = RREG32(DC_HPD5_INT_CONTROL);
192 WREG32(DC_HPD5_INT_CONTROL, tmp);
1534 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
1535 WREG32(DC_HPD5_INT_CONTROL, tmp);
1564 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN;
1638 WREG32(DC_HPD5_INT_CONTROL, hpd5);
1712 tmp = RREG32(DC_HPD5_INT_CONTROL);
1714 WREG32(DC_HPD5_INT_CONTROL, tmp);
1717 tmp = RREG32(DC_HPD5_INT_CONTROL);
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| H A D | r600.c | 691 tmp = RREG32(DC_HPD5_INT_CONTROL);
696 WREG32(DC_HPD5_INT_CONTROL, tmp);
2925 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
2926 WREG32(DC_HPD5_INT_CONTROL, tmp);
3055 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN;
3125 WREG32(DC_HPD5_INT_CONTROL, hpd5);
3203 tmp = RREG32(DC_HPD5_INT_CONTROL);
3205 WREG32(DC_HPD5_INT_CONTROL, tmp);
3208 tmp = RREG32(DC_HPD5_INT_CONTROL);
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| H A D | evergreend.h | 545 #define DC_HPD5_INT_CONTROL 0x6050 macro
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| H A D | r600d.h | 703 #define DC_HPD5_INT_CONTROL 0x7dc4 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/radeon/ |
| H A D | evergreen.c | 187 tmp = RREG32(DC_HPD5_INT_CONTROL);
192 WREG32(DC_HPD5_INT_CONTROL, tmp);
1534 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
1535 WREG32(DC_HPD5_INT_CONTROL, tmp);
1564 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN;
1638 WREG32(DC_HPD5_INT_CONTROL, hpd5);
1712 tmp = RREG32(DC_HPD5_INT_CONTROL);
1714 WREG32(DC_HPD5_INT_CONTROL, tmp);
1717 tmp = RREG32(DC_HPD5_INT_CONTROL);
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| H A D | r600.c | 691 tmp = RREG32(DC_HPD5_INT_CONTROL);
696 WREG32(DC_HPD5_INT_CONTROL, tmp);
2925 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
2926 WREG32(DC_HPD5_INT_CONTROL, tmp);
3055 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN;
3125 WREG32(DC_HPD5_INT_CONTROL, hpd5);
3203 tmp = RREG32(DC_HPD5_INT_CONTROL);
3205 WREG32(DC_HPD5_INT_CONTROL, tmp);
3208 tmp = RREG32(DC_HPD5_INT_CONTROL);
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| H A D | evergreend.h | 545 #define DC_HPD5_INT_CONTROL 0x6050 macro
|
| H A D | r600d.h | 703 #define DC_HPD5_INT_CONTROL 0x7dc4 macro
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