Searched refs:DCPLB_ADDR5 (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/include/asm/
H A Dcdef_LPBlackfin.h38 #define bfin_read_DCPLB_ADDR5() bfin_read32(DCPLB_ADDR5)
39 #define bfin_write_DCPLB_ADDR5(val) bfin_write32(DCPLB_ADDR5,val)
H A Ddef_LPBlackfin.h249 #define DCPLB_ADDR5 0xFFE00114 /* Data Cacheability Protection macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/include/asm/
H A Dcdef_LPBlackfin.h38 #define bfin_read_DCPLB_ADDR5() bfin_read32(DCPLB_ADDR5)
39 #define bfin_write_DCPLB_ADDR5(val) bfin_write32(DCPLB_ADDR5,val)
H A Ddef_LPBlackfin.h249 #define DCPLB_ADDR5 0xFFE00114 /* Data Cacheability Protection macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-common/
H A Ddpmc_modes.S410 PM_PUSH(DCPLB_ADDR5)
696 PM_POP(DCPLB_ADDR5)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-common/
H A Ddpmc_modes.S410 PM_PUSH(DCPLB_ADDR5)
696 PM_POP(DCPLB_ADDR5)

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