Searched refs:CR_SET (Results 1 - 9 of 9) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/ppc/ |
H A D | altivec_expression.h | 31 CR_SET(6, 1 << 3); \ 36 CR_SET(6, 1 << 1); \ 38 CR_SET(6, 0); \
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H A D | emul_generic.c | 128 CR_SET(0, cr_i_summary_overflow); 132 CR_SET(0, 0); 145 CR_SET(0, cr_i_summary_overflow); 150 CR_SET(0, 0);
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H A D | idecode_expression.h | 258 CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \ 270 #define CR_SET(REG, VAL) MBLIT32(CR, REG*4, REG*4+3, VAL) macro 277 CR_SET(REG, new_bits); \ 285 CR_SET(REG, new_bits); \
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/ppc/ |
H A D | altivec_expression.h | 31 CR_SET(6, 1 << 3); \ 36 CR_SET(6, 1 << 1); \ 38 CR_SET(6, 0); \
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H A D | emul_generic.c | 128 CR_SET(0, cr_i_summary_overflow); 132 CR_SET(0, 0); 145 CR_SET(0, cr_i_summary_overflow); 150 CR_SET(0, 0);
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H A D | idecode_expression.h | 258 CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \ 270 #define CR_SET(REG, VAL) MBLIT32(CR, REG*4, REG*4+3, VAL) macro 277 CR_SET(REG, new_bits); \ 285 CR_SET(REG, new_bits); \
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/ppc/ |
H A D | altivec_expression.h | 31 CR_SET(6, 1 << 3); \ 36 CR_SET(6, 1 << 1); \ 38 CR_SET(6, 0); \
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H A D | idecode_expression.h | 258 CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \ 270 #define CR_SET(REG, VAL) MBLIT32(CR, REG*4, REG*4+3, VAL) macro 277 CR_SET(REG, new_bits); \ 285 CR_SET(REG, new_bits); \
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H A D | emul_generic.c | 128 CR_SET(0, cr_i_summary_overflow); 132 CR_SET(0, 0); 145 CR_SET(0, cr_i_summary_overflow); 150 CR_SET(0, 0);
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