Searched refs:CORE_CLK_SRC_DPLL_X2 (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap2/
H A Dclkt2xxx_dpllcore.c101 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
123 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2;
125 done_rate = CORE_CLK_SRC_DPLL_X2;
141 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
H A Dclkt2xxx_virt_prcm_set.c97 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
105 CORE_CLK_SRC_DPLL_X2)
106 done_rate = CORE_CLK_SRC_DPLL_X2;
129 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
H A Dsdrc2xxx.c44 static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2;
79 * CORE_CLK_SRC_DPLL_X2 (for CORE_CLK = * DPLL_CLK * 2)
94 else if (level == CORE_CLK_SRC_DPLL_X2)
H A Dclock.h27 #define CORE_CLK_SRC_DPLL_X2 0x2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap2/
H A Dclkt2xxx_dpllcore.c101 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
123 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2;
125 done_rate = CORE_CLK_SRC_DPLL_X2;
141 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
H A Dclkt2xxx_virt_prcm_set.c97 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
105 CORE_CLK_SRC_DPLL_X2)
106 done_rate = CORE_CLK_SRC_DPLL_X2;
129 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
H A Dsdrc2xxx.c44 static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2;
79 * CORE_CLK_SRC_DPLL_X2 (for CORE_CLK = * DPLL_CLK * 2)
94 else if (level == CORE_CLK_SRC_DPLL_X2)
H A Dclock.h27 #define CORE_CLK_SRC_DPLL_X2 0x2 macro

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