Searched refs:CNS3XXX_PCIE1_MEM_BASE (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-cns3xxx/
H A Dpcie.c260 .start = CNS3XXX_PCIE1_MEM_BASE,
261 .end = CNS3XXX_PCIE1_MEM_BASE + SZ_16M - 1,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-cns3xxx/
H A Dpcie.c260 .start = CNS3XXX_PCIE1_MEM_BASE,
261 .end = CNS3XXX_PCIE1_MEM_BASE + SZ_16M - 1,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-cns3xxx/include/mach/
H A Dcns3xxx.h210 #define CNS3XXX_PCIE1_MEM_BASE 0xB0000000 /* PCIe Port 1 IO/Memory Space */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-cns3xxx/include/mach/
H A Dcns3xxx.h210 #define CNS3XXX_PCIE1_MEM_BASE 0xB0000000 /* PCIe Port 1 IO/Memory Space */ macro

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