Searched refs:CLR_V (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/powerpc/mm/
H A Dhash_low_32.S307 #define CLR_V(r,t) rlwinm r,r,0,1,31 define
464 CLR_V(r5,r0) /* clear V (valid) bit in PTE */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/powerpc/mm/
H A Dhash_low_32.S307 #define CLR_V(r,t) rlwinm r,r,0,1,31 define
464 CLR_V(r5,r0) /* clear V (valid) bit in PTE */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/m68hc11/
H A Dgencode.c56 #define CLR_V 0,M6811_V_BIT,0 macro
369 { "clv", 0, 0, 1, 0x0a, 2, 2, CLR_V },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/m68hc11/
H A Dgencode.c56 #define CLR_V 0,M6811_V_BIT,0 macro
369 { "clv", 0, 0, 1, 0x0a, 2, 2, CLR_V },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/m68hc11/
H A Dgencode.c56 #define CLR_V 0,M6811_V_BIT,0 macro
369 { "clv", 0, 0, 1, 0x0a, 2, 2, CLR_V },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/opcodes/
H A Dm68hc11-opc.c54 #define CLR_V 0,M6811_V_BIT,0 macro
364 { "clv", OP_NONE, 1, 0x0a, 2, 2, CLR_V, cpu6811 },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/opcodes/
H A Dm68hc11-opc.c54 #define CLR_V 0,M6811_V_BIT,0 macro
364 { "clv", OP_NONE, 1, 0x0a, 2, 2, CLR_V, cpu6811 },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/opcodes/
H A Dm68hc11-opc.c54 #define CLR_V 0,M6811_V_BIT,0 macro
364 { "clv", OP_NONE, 1, 0x0a, 2, 2, CLR_V, cpu6811 },

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