Searched refs:C0_CONFIG (Results 1 - 25 of 34) sorted by relevance

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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/src/
H A Drm5200_l1cache.S107 mfc0 t0,C0_CONFIG
142 mfc0 t0,C0_CONFIG
146 mtc0 t0,C0_CONFIG
233 mfc0 t0,C0_CONFIG
277 mfc0 t0,C0_CONFIG
H A Drm5200_cpu.S133 mfc0 t1,C0_CONFIG
157 mtc0 t1,C0_CONFIG
H A Drm5200_cpuinit.S225 mfc0 v0,C0_CONFIG # get current CONFIG register
229 mtc0 v0,C0_CONFIG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/src/
H A Dbcmcore_l1cache.S53 mfc0 t0,C0_CONFIG,1
115 mfc0 t0,C0_CONFIG,1
166 mfc0 t1,C0_CONFIG
186 mfc0 v0,C0_CONFIG # get current CONFIG register
190 mtc0 v0,C0_CONFIG
218 mfc0 t0,C0_CONFIG,1
301 mfc0 t0,C0_CONFIG,1
H A Dbcmcore_cpuinit.S100 mfc0 v0,C0_CONFIG,7
102 mtc0 v0,C0_CONFIG,7
130 mfc0 v0,C0_CONFIG,1
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/src/
H A Drm7000_l2cache.S118 mfc0 t0,C0_CONFIG
121 mtc0 t0,C0_CONFIG
H A Drm7000_cpuinit.S225 mfc0 v0,C0_CONFIG # get current CONFIG register
229 mtc0 v0,C0_CONFIG
H A Drm7000_cpu.S156 mfc0 t1,C0_CONFIG
182 mtc0 t1,C0_CONFIG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/lzma-loader/
H A Dhead.S12 #define C0_CONFIG $16 define
67 mfc0 s0,C0_CONFIG,1
99 mfc0 s6,C0_CONFIG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/lzma-loader/
H A Dhead.S12 #define C0_CONFIG $16 define
67 mfc0 s0,C0_CONFIG,1
99 mfc0 s6,C0_CONFIG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/lzma-loader/
H A Dhead.S12 #define C0_CONFIG $16 define
67 mfc0 s0,C0_CONFIG,1
99 mfc0 s6,C0_CONFIG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/shared/
H A Dmin_osl.c46 c0reg = MFC0(C0_CONFIG, 0);
49 MTC0(C0_CONFIG, 0, c0reg);
66 config = MFC0(C0_CONFIG, 0);
68 config1 = MFC0(C0_CONFIG, 1);
H A Dboot.S311 mfc0 t0,C0_CONFIG
326 mfc0 s6,C0_CONFIG
343 mfc0 a0,C0_CONFIG,1 # a0 has CP0 CONFIG1
440 mfc0 t0,C0_CONFIG
443 mtc0 t0,C0_CONFIG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/common/include/
H A Dmipsmacros.h394 mfc0 treg,C0_CONFIG ; \
398 mtc0 treg,C0_CONFIG ; \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/src/
H A Dsb1_cpuinit.S225 mfc0 v0,C0_CONFIG # get current CONFIG register
229 mtc0 v0,C0_CONFIG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/
H A Dsbmips.h231 #define C0_CONFIG $16 /* CP0: Config */ macro
265 #define C0_CONFIG 16 /* CP0: Config */ macro
425 _cp0_get_reg_u32 (config, C0_CONFIG, 0)
426 _cp0_set_reg_u32 (config, C0_CONFIG, 0)
429 _cp0_get_reg_u32 (config1, C0_CONFIG, 1)
432 _cp0_get_reg_u32 (config2, C0_CONFIG, 2)
435 _cp0_get_reg_u32 (config3, C0_CONFIG, 3)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/include/
H A Dmipsinc.h88 #define C0_CONFIG $16 macro
166 #define C0_CONFIG 16 /* CP0: Config */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/mips/
H A Dinterp.c1811 C0_CONFIG = 0x80000000 /* Config1 present */
1818 C0_CONFIG |= (2 << 13); /* MIPS64, 64-bit addresses */
1820 C0_CONFIG |= (1 << 13); /* MIPS64, 32-bit addresses */
1823 C0_CONFIG |= 0x00008000; /* Big Endian */
2319 GPR[rt] = C0_CONFIG;
2322 C0_CONFIG = (C0_CONFIG & ~0x7) | (GPR[rt] & 0x7);
2366 /* [D]MFC0 RT,C0_CONFIG,SEL */
2371 cfg = C0_CONFIG;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/mips/
H A Dinterp.c1811 C0_CONFIG = 0x80000000 /* Config1 present */
1818 C0_CONFIG |= (2 << 13); /* MIPS64, 64-bit addresses */
1820 C0_CONFIG |= (1 << 13); /* MIPS64, 32-bit addresses */
1823 C0_CONFIG |= 0x00008000; /* Big Endian */
2319 GPR[rt] = C0_CONFIG;
2322 C0_CONFIG = (C0_CONFIG & ~0x7) | (GPR[rt] & 0x7);
2366 /* [D]MFC0 RT,C0_CONFIG,SEL */
2371 cfg = C0_CONFIG;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/mips/
H A Dinterp.c1811 C0_CONFIG = 0x80000000 /* Config1 present */
1818 C0_CONFIG |= (2 << 13); /* MIPS64, 64-bit addresses */
1820 C0_CONFIG |= (1 << 13); /* MIPS64, 32-bit addresses */
1823 C0_CONFIG |= 0x00008000; /* Big Endian */
2319 GPR[rt] = C0_CONFIG;
2322 C0_CONFIG = (C0_CONFIG & ~0x7) | (GPR[rt] & 0x7);
2366 /* [D]MFC0 RT,C0_CONFIG,SEL */
2371 cfg = C0_CONFIG;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/include/
H A Dsbmips.h224 #define C0_CONFIG $16 /* CP0: Config */ macro
253 #define C0_CONFIG 16 /* CP0: Config */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/include/
H A Dr5kc0.h334 #define C0_CONFIG $16 macro
450 #define C0_CONFIG 16 macro
H A Dsbmips.h224 #define C0_CONFIG $16 /* CP0: Config */ macro
252 #define C0_CONFIG 16 /* CP0: Config */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/include/
H A Dr5kc0.h335 #define C0_CONFIG $16 macro
451 #define C0_CONFIG 16 macro
H A Dsbmips.h224 #define C0_CONFIG $16 /* CP0: Config */ macro
252 #define C0_CONFIG 16 /* CP0: Config */ macro

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