/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/src/ |
H A D | rm5200_l1cache.S | 107 mfc0 t0,C0_CONFIG 142 mfc0 t0,C0_CONFIG 146 mtc0 t0,C0_CONFIG 233 mfc0 t0,C0_CONFIG 277 mfc0 t0,C0_CONFIG
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H A D | rm5200_cpu.S | 133 mfc0 t1,C0_CONFIG 157 mtc0 t1,C0_CONFIG
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H A D | rm5200_cpuinit.S | 225 mfc0 v0,C0_CONFIG # get current CONFIG register 229 mtc0 v0,C0_CONFIG
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/src/ |
H A D | bcmcore_l1cache.S | 53 mfc0 t0,C0_CONFIG,1 115 mfc0 t0,C0_CONFIG,1 166 mfc0 t1,C0_CONFIG 186 mfc0 v0,C0_CONFIG # get current CONFIG register 190 mtc0 v0,C0_CONFIG 218 mfc0 t0,C0_CONFIG,1 301 mfc0 t0,C0_CONFIG,1
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H A D | bcmcore_cpuinit.S | 100 mfc0 v0,C0_CONFIG,7 102 mtc0 v0,C0_CONFIG,7 130 mfc0 v0,C0_CONFIG,1
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/src/ |
H A D | rm7000_l2cache.S | 118 mfc0 t0,C0_CONFIG 121 mtc0 t0,C0_CONFIG
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H A D | rm7000_cpuinit.S | 225 mfc0 v0,C0_CONFIG # get current CONFIG register 229 mtc0 v0,C0_CONFIG
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H A D | rm7000_cpu.S | 156 mfc0 t1,C0_CONFIG 182 mtc0 t1,C0_CONFIG
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/lzma-loader/ |
H A D | head.S | 12 #define C0_CONFIG $16 define 67 mfc0 s0,C0_CONFIG,1 99 mfc0 s6,C0_CONFIG
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/lzma-loader/ |
H A D | head.S | 12 #define C0_CONFIG $16 define 67 mfc0 s0,C0_CONFIG,1 99 mfc0 s6,C0_CONFIG
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/lzma-loader/ |
H A D | head.S | 12 #define C0_CONFIG $16 define 67 mfc0 s0,C0_CONFIG,1 99 mfc0 s6,C0_CONFIG
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/shared/ |
H A D | min_osl.c | 46 c0reg = MFC0(C0_CONFIG, 0); 49 MTC0(C0_CONFIG, 0, c0reg); 66 config = MFC0(C0_CONFIG, 0); 68 config1 = MFC0(C0_CONFIG, 1);
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H A D | boot.S | 311 mfc0 t0,C0_CONFIG 326 mfc0 s6,C0_CONFIG 343 mfc0 a0,C0_CONFIG,1 # a0 has CP0 CONFIG1 440 mfc0 t0,C0_CONFIG 443 mtc0 t0,C0_CONFIG
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/common/include/ |
H A D | mipsmacros.h | 394 mfc0 treg,C0_CONFIG ; \ 398 mtc0 treg,C0_CONFIG ; \
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/src/ |
H A D | sb1_cpuinit.S | 225 mfc0 v0,C0_CONFIG # get current CONFIG register 229 mtc0 v0,C0_CONFIG
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/ |
H A D | sbmips.h | 231 #define C0_CONFIG $16 /* CP0: Config */ macro 265 #define C0_CONFIG 16 /* CP0: Config */ macro 425 _cp0_get_reg_u32 (config, C0_CONFIG, 0) 426 _cp0_set_reg_u32 (config, C0_CONFIG, 0) 429 _cp0_get_reg_u32 (config1, C0_CONFIG, 1) 432 _cp0_get_reg_u32 (config2, C0_CONFIG, 2) 435 _cp0_get_reg_u32 (config3, C0_CONFIG, 3)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/include/ |
H A D | mipsinc.h | 88 #define C0_CONFIG $16 macro 166 #define C0_CONFIG 16 /* CP0: Config */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/mips/ |
H A D | interp.c | 1811 C0_CONFIG = 0x80000000 /* Config1 present */ 1818 C0_CONFIG |= (2 << 13); /* MIPS64, 64-bit addresses */ 1820 C0_CONFIG |= (1 << 13); /* MIPS64, 32-bit addresses */ 1823 C0_CONFIG |= 0x00008000; /* Big Endian */ 2319 GPR[rt] = C0_CONFIG; 2322 C0_CONFIG = (C0_CONFIG & ~0x7) | (GPR[rt] & 0x7); 2366 /* [D]MFC0 RT,C0_CONFIG,SEL */ 2371 cfg = C0_CONFIG;
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/mips/ |
H A D | interp.c | 1811 C0_CONFIG = 0x80000000 /* Config1 present */ 1818 C0_CONFIG |= (2 << 13); /* MIPS64, 64-bit addresses */ 1820 C0_CONFIG |= (1 << 13); /* MIPS64, 32-bit addresses */ 1823 C0_CONFIG |= 0x00008000; /* Big Endian */ 2319 GPR[rt] = C0_CONFIG; 2322 C0_CONFIG = (C0_CONFIG & ~0x7) | (GPR[rt] & 0x7); 2366 /* [D]MFC0 RT,C0_CONFIG,SEL */ 2371 cfg = C0_CONFIG;
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/mips/ |
H A D | interp.c | 1811 C0_CONFIG = 0x80000000 /* Config1 present */ 1818 C0_CONFIG |= (2 << 13); /* MIPS64, 64-bit addresses */ 1820 C0_CONFIG |= (1 << 13); /* MIPS64, 32-bit addresses */ 1823 C0_CONFIG |= 0x00008000; /* Big Endian */ 2319 GPR[rt] = C0_CONFIG; 2322 C0_CONFIG = (C0_CONFIG & ~0x7) | (GPR[rt] & 0x7); 2366 /* [D]MFC0 RT,C0_CONFIG,SEL */ 2371 cfg = C0_CONFIG;
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/include/ |
H A D | sbmips.h | 224 #define C0_CONFIG $16 /* CP0: Config */ macro 253 #define C0_CONFIG 16 /* CP0: Config */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/include/ |
H A D | r5kc0.h | 334 #define C0_CONFIG $16 macro 450 #define C0_CONFIG 16 macro
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H A D | sbmips.h | 224 #define C0_CONFIG $16 /* CP0: Config */ macro 252 #define C0_CONFIG 16 /* CP0: Config */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/include/ |
H A D | r5kc0.h | 335 #define C0_CONFIG $16 macro 451 #define C0_CONFIG 16 macro
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H A D | sbmips.h | 224 #define C0_CONFIG $16 /* CP0: Config */ macro 252 #define C0_CONFIG 16 /* CP0: Config */ macro
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