Searched refs:BIT_29 (Results 1 - 11 of 11) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/bcm57xx/sys/
H A Dbits.h54 #define BIT_29 0x20000000 macro
H A Dtigon3.h1715 #define MI_COM_START BIT_29
1716 #define MI_COM_BUSY BIT_29
2686 #define GRC_MODE_4X_NIC_BASED_SEND_RINGS BIT_29
2860 (BIT_30 | BIT_29 | BIT_28)
2864 #define FLASH_PART_5752_PAGE_SIZE_1K BIT_29
2865 #define FLASH_PART_5752_PAGE_SIZE_2K (BIT_29 | BIT_28)
H A Dtigon3.c4138 REG_WR(pDevice, PciCfg.MsiData, Value32 | BIT_26 | BIT_28 | BIT_29);
5704 REG_WR(pDevice, Grc.MiscCfg, BIT_29); /* Write bit 29 first */
5705 Value32 |= BIT_29; /* and keep bit 29 set during GRC reset */
5863 REG_WR_OFFSET(pDevice, 0x7c00, Value32 | BIT_25 | BIT_29);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/scsi/qla4xxx/
H A Dql4_def.h108 #define BIT_29 0x20000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/scsi/qla4xxx/
H A Dql4_def.h108 #define BIT_29 0x20000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/scsi/qla2xxx/
H A Dqla_def.h87 #define BIT_29 0x20000000 macro
715 #define MBX_29 BIT_29
2519 #define DT_OEM_001 BIT_29
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/scsi/qla2xxx/
H A Dqla_def.h87 #define BIT_29 0x20000000 macro
715 #define MBX_29 BIT_29
2519 #define DT_OEM_001 BIT_29
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/qlcnic/
H A Dqlcnic_hdr.h240 #define BIT_29 0x20000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/scsi/
H A Dqla1280.h55 #define BIT_29 0x20000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/scsi/
H A Dqla1280.h55 #define BIT_29 0x20000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/qlcnic/
H A Dqlcnic_hdr.h240 #define BIT_29 0x20000000 macro

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