Searched refs:AT91_PMC (Results 1 - 20 of 20) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-at91/include/mach/
H A Dat91_pmc.h19 #define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */
20 #define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */
22 #define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */
39 #define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */
40 #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
41 #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
43 #define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [some SAM9, CAP9] */
49 #define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
54 #define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */
58 #define AT91_CKGR_PLLAR (AT91_PMC
[all...]
H A Dat91rm9200.h91 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ macro
H A Dat91sam9261.h79 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat572d940hf.h100 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91cap9.h98 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91sam9rl.h87 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91sam9260.h96 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91sam9263.h95 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91sam9g45.h105 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-at91/include/mach/
H A Dat91_pmc.h19 #define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */
20 #define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */
22 #define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */
39 #define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */
40 #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
41 #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
43 #define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [some SAM9, CAP9] */
49 #define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
54 #define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */
58 #define AT91_CKGR_PLLAR (AT91_PMC
[all...]
H A Dat91rm9200.h91 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ macro
H A Dat91sam9261.h79 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat572d940hf.h100 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91cap9.h98 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91sam9rl.h87 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91sam9260.h96 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91sam9263.h95 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
H A Dat91sam9g45.h105 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-at91/
H A Dpm_slowclock.S56 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
70 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
84 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
98 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
112 * R1 = Base address of AT91_PMC
159 ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
166 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
177 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
183 ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
188 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-at91/
H A Dpm_slowclock.S56 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
70 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
84 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
98 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
112 * R1 = Base address of AT91_PMC
159 ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
166 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
177 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
183 ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
188 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
[all...]

Completed in 76 milliseconds