Searched refs:AT91_MC (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-at91/include/mach/
H A Dat91rm9200_mc.h20 #define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */
23 #define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */
43 #define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */
45 #define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */
52 #define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */
65 #define AT91_EBI_CFGR (AT91_MC + 0x64) /* Configuration Register */
69 #define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */
91 #define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */
102 #define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */
105 #define AT91_SDRAMC_CR (AT91_MC
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H A Dat91rm9200.h94 #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-at91/include/mach/
H A Dat91rm9200_mc.h20 #define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */
23 #define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */
43 #define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */
45 #define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */
52 #define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */
65 #define AT91_EBI_CFGR (AT91_MC + 0x64) /* Configuration Register */
69 #define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */
91 #define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */
102 #define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */
105 #define AT91_SDRAMC_CR (AT91_MC
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H A Dat91rm9200.h94 #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ macro

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